公开(公告)号：US20150214910A1

公开(公告)日：2015-07-30

申请号：US14681569

申请日：2015-04-08

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yi Jun Duan

IPC: H03F3/45

CPC classification number: H03F3/45179 ,  H02H9/043 ,  H03F3/45071 ,  H03F3/45183 ,  H03F2200/471 ,  H03F2203/45022 ,  H03F2203/45526 ,  H03F2203/45674

Abstract: Described herein is an electronic device. The electronic device includes a unity gain buffer having an input coupled to an input node to receive an input voltage and an output coupled to an output node. A current sink circuit operates in a sleep mode in an absence of a sink current flowing into the output node, and operates in a sinking mode to sink the sink current from the output node to a reference supply node when the sink current flows into the output node.

Abstract translation: 这里描述的是电子设备。 电子设备包括单位增益缓冲器，其具有耦合到输入节点的输入以接收输入电压和耦合到输出节点的输出。 电流吸收电路在没有流入输出节点的吸收电流的情况下以睡眠模式工作，并且当吸收电流流入输出端时工作在吸收模式以将吸收电流从输出节点吸收到参考供应节点 节点。

公开(公告)号：US20150185754A1

公开(公告)日：2015-07-02

申请号：US14519225

申请日：2014-10-21

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd

Inventor： Yong Feng Liu

IPC: G05F3/26

CPC classification number: G05F3/267 ,  G05F1/463 ,  G05F3/242

Abstract: A reference current path carries a reference current. A first transistor is coupled to the reference current path. A second transistor is also coupled to the reference current path. The first and second transistors are connected in parallel to carry the reference current. The first transistor is biased by a first voltage (which is a bandgap voltage plus a threshold voltage). The second transistor is biased by a second voltage (which is a PTAT voltage plus a threshold voltage). The first and second transistors are thus biased by voltages having different and opposite temperature coefficients with a result that the temperature coefficients of the currents flowing in the first and second transistors are opposite and the reference current accordingly has a low temperature coefficient.

Abstract translation: 参考电流路径携带参考电流。 第一晶体管耦合到参考电流路径。 第二晶体管也耦合到参考电流路径。 第一和第二晶体管并联连接以承载参考电流。 第一晶体管被第一电压（其是带隙电压加上阈值电压）偏置。 第二晶体管被第二电压（其为PTAT电压加上阈值电压）偏置。 因此，第一和第二晶体管被具有不同和相反的温度系数的电压偏置，结果是在第一和第二晶体管中流动的电流的温度系数相反，并且参考电流相应地具有低的温度系数。

公开(公告)号：US09058766B2

公开(公告)日：2015-06-16

申请号：US13649821

申请日：2012-10-11

Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD

Inventor： HaiBo Zhang ,  Jin Li

IPC: H02H3/20 ,  H05B37/02 ,  G09G3/20

CPC classification number: G09G3/20 ,  G09G2330/02 ,  G09G2330/08 ,  G09G2330/10

Abstract: A device and method for detecting a short circuit in an electrical component during a start-up routine. In an embodiment, a device may have a problematic display having a short circuit that may result in damage to other components of the device if the device were allowed to fully startup during a normal start-up routine. Thus, power supplied to the panel may be initiated in stages so as to monitor any current that may be flowing through the panel, which in turn, may be indicative of a short circuit in the panel. If enough “leakage” current is detected through the panel during this staged startup routine, then a short-circuit detection circuit may interrupt the startup routine and lock out the operation of the device until the detected short circuit in the panel can be addressed.

Abstract translation: 一种用于在启动程序期间检测电气部件中的短路的装置和方法。 在一个实施例中，如果设备在正常启动程序中被允许完全启动，则设备可能具有可能导致设备的其他组件损坏的短路的有问题的显示。 因此，提供给面板的功率可以分阶段地启动，以便监视可能流过面板的任何电流，这又可能表示面板中的短路。 如果在此分段启动程序期间通过面板检测到足够的“泄漏”电流，则短路检测电路可能会中断启动程序并锁定设备的操作，直到可以寻址检测到的面板短路。

公开(公告)号：US20140300388A1

公开(公告)日：2014-10-09

申请号：US14310952

申请日：2014-06-20

Applicant: STMICROELECTRONICS (SHENZHEN) R&D CO. LTD.

Inventor： Min CHEN ,  Wen LIU ,  HongXia LI ,  XiaoWu DAI

IPC: H03K17/16

CPC classification number: H03K17/167 ,  H03K17/163 ,  H03K17/164 ,  H03K17/166

Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.

Abstract translation: 开关电路包括：第一输入级，具有用于接收第一输入信号的输入端，输出端和用于接收增加的模拟电流的电源端;第二输入级，具有用于接收第二输入信号的输入端，输出端，以及 用于接收减小的模拟电流的电源端子，以及耦合到第一输入级和第二输入级的输出的输出节点，用于提供开关输出信号。 输出级耦合在第一和第二输入级与输出节点之间。 第一和第二输入级是运算放大器。

公开(公告)号：US20140285258A1

公开(公告)日：2014-09-25

申请号：US14199773

申请日：2014-03-06

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Ru Feng Du ,  Qi Yu Liu

IPC: H03F3/217

CPC classification number: H03F3/2171 ,  H03F3/2175

Abstract: A Class-D amplifier includes a pre-amplifier having an input configured to receive an amplifier reference voltage signal which is ramped at start-up at a fast rate. An integrator has a first input configured to receive an input signal from the pre-amplifier and a second input configured to receive an integrator reference voltage signal which is ramped at start-up at a slower rate. A modulator has an input coupled to an output of the integrator. The modulator generates a pulse width modulated output signal. Operation of the Class-D amplifier is controlled at start-up by applying a slow ramped signal as the integrator reference voltage signal and a fast ramped signal as the amplifier reference voltage so that the pulse width modulated output signal exhibits an increasing change in duty cycle in response to an increasing voltage of the integrator reference voltage signal, and no “pop” is introduced at start-up.

Abstract translation: D类放大器包括前置放大器，其具有被配置为接收在启动时以快速速率斜坡的放大器参考电压信号的输入。 积分器具有被配置为从前置放大器接收输入信号的第一输入和被配置为接收以较慢速率在启动时斜坡上升的积分器参考电压信号的第二输入。 调制器具有耦合到积分器的输出的输入。 调制器产生脉宽调制输出信号。 通过将缓慢斜坡信号作为积分器参考电压信号和快速斜坡信号作为放大器参考电压来控制D类放大器的工作，使得脉宽调制输出信号在占空比上呈现增加的变化 响应于积分器参考电压信号的增加的电压，并且在启动时不引入“弹出”。

公开(公告)号：US08779801B2

公开(公告)日：2014-07-15

申请号：US13692702

申请日：2012-12-03

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Min Chen ,  Wen Liu ,  HongXia Li ,  XiaoWu Dai

IPC: G01R19/00

CPC classification number: H03K17/167 ,  H03K17/163 ,  H03K17/164 ,  H03K17/166

Abstract: A switching circuit includes a first input stage having an input for receiving a first input signal, an output, and a power terminal for receiving an increasing analog current, a second input stage having an input for receiving a second input signal, an output, and a power terminal for receiving a decreasing analog current, and an output node coupled to the outputs of the first input stage and the second input stage for providing a switched output signal. An output stage is coupled between the first and second input stages and the output node. The first and second input stages are operational amplifiers.

Abstract translation: 开关电路包括：第一输入级，具有用于接收第一输入信号的输入端，输出端和用于接收增加的模拟电流的电源端;第二输入级，具有用于接收第二输入信号的输入端，输出端，以及 用于接收减小的模拟电流的电源端子，以及耦合到第一输入级和第二输入级的输出的输出节点，用于提供开关输出信号。 输出级耦合在第一和第二输入级与输出节点之间。 第一和第二输入级是运算放大器。

公开(公告)号：US08691684B2

公开(公告)日：2014-04-08

申请号：US13906223

申请日：2013-05-30

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Guo Hua Zhong ,  Mei Yang

IPC: H01L21/44

CPC classification number: H01L21/4871 ,  H01L23/4824 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power transistor for use in an audio application is laid out to minimize hot spots. Hot spots are created by non-uniform power dissipation or overly concentrated current densities. The source and drain pads are disposed relative to each other to facilitate uniform power dissipation. Interleaving metal fingers and upper metal layers are connected directly to lower metal layers in the absence of vias to improve current density distribution. This layout improves some fail detection tests by 17%.

Abstract translation: 布置用于音频应用的功率晶体管以最小化热点。 热点由不均匀的功耗或过度集中的电流密度产生。 源极和漏极焊盘相对于彼此设置以促进均匀的功率耗散。 在没有通孔的情况下，交叉金属指和上金属层直接连接到下金属层，以改善电流密度分布。 这种布局改进了17％的失败检测测试。

公开(公告)号：US08648641B2

公开(公告)日：2014-02-11

申请号：US13678782

申请日：2012-11-16

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Gang Zha

IPC: H03L5/00

CPC classification number: H03L5/00 ,  H03H11/245

Abstract: A voltage controlled variable resistor circuit is configured to variably attenuate a variable source signal. A fixed attenuation circuit is coupled to receive the variable source signal and output an attenuated variable source signal. The variable source signal is further applied across a variable resistive divider formed of a fixed resistive circuit and a variable resistive circuit. The variable resistive circuit has a first input configured to receive the attenuated variable source signal and a second input configured to receive a variable resistance control signal. The variable resistive circuit is configured to have a resistance which is variable in response to the attenuated variable source signal and the variable resistance control signal.

Abstract translation: 电压控制可变电阻电路被配置为可变地衰减可变源信号。 耦合固定衰减电路以接收可变源信号并输出​​衰减的可变源信号。 可变源信号进一步施加在由固定电阻电路和可变电阻电路构成的可变电阻分压器上。 可变电阻电路具有被配置为接收衰减的可变源信号的第一输入和被配置为接收可变电阻控制信号的第二输入。 可变电阻电路被配置为具有响应于衰减的可变源信号和可变电阻控制信号而变化的电阻。

公开(公告)号：US20130267087A1

公开(公告)日：2013-10-10

申请号：US13906223

申请日：2013-05-30

Applicant: STMicroelectronics (Shenzhen) R&D Co. Ltd.

Inventor： Guo Hua Zhong ,  Mei Yang

IPC: H01L21/48

CPC classification number: H01L21/4871 ,  H01L23/4824 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A power transistor for use in an audio application is laid out to minimize hot spots. Hot spots are created by non-uniform power dissipation or overly concentrated current densities. The source and drain pads are disposed relative to each other to facilitate uniform power dissipation. Interleaving metal fingers and upper metal layers are connected directly to lower metal layers in the absence of vias to improve current density distribution. This layout improves some fail detection tests by 17%.

Abstract translation: 布置用于音频应用的功率晶体管以最小化热点。 热点由不均匀的功耗或过度集中的电流密度产生。 源极和漏极焊盘相对于彼此设置以促进均匀的功率耗散。 在没有通孔的情况下，交叉金属指和上金属层直接连接到下金属层，以改善电流密度分布。 这种布局改进了17％的失败检测测试。

公开(公告)号：US20130188793A1

公开(公告)日：2013-07-25

申请号：US13692789

申请日：2012-12-03

Applicant: STMicroelectronics (Shenzhen) R&D CO. LTD. ,  STMicroelectronics, S.r.l.

Inventor： XiangSheng LI ,  Cristiano MERONI ,  Mei YANG ,  XianFeng XIONG

IPC: H03G11/00

CPC classification number: H03G3/348 ,  H03F1/52 ,  H03F3/183 ,  H03F3/21 ,  H03F2200/321 ,  H03F2200/375 ,  H03F2200/471 ,  H03F2200/78 ,  H03G11/00 ,  H04R1/00 ,  H04R3/007 ,  H04R2201/028 ,  H04R2499/13

Abstract: A method of operating a speaker system including a speaker coupled to an amplifier, and a dedicated digital speaker protection circuit includes turning on the amplifier in a mute mode, after a first delay period, issuing a play command to the amplifier to place the amplifier in a play mode, but without an input signal during a second delay period, and performing a speaker offset detection during the second delay period, wherein, if there is an offset, then the amplifier is forced back into the mute mode, and if there is no offset, then the amplifier is allowed to continue to operate in the play mode. The method also includes issuing a speaker protection control signal or command if an offset is detected.