公开(公告)号：US20030030130A1

公开(公告)日：2003-02-13

申请号：US10208258

申请日：2002-07-29

Applicant: STMicroelectronics S.r.I.

Inventor： Luca Pividori

IPC: H01L029/06

CPC classification number: H01L21/304 ,  B28D5/0011 ,  H01L21/78

Abstract: A semiconductor device including an electronic component and an edge region delimited by a side surface. The device is formed in a substrate of semiconductor material overlaid by a plurality of superficial layers which form, on top of the edge region, a stack of insulating layers. A first groove extends in the stack of insulating layers near the electronic component. A second groove extends in the stack of insulating layers between the first groove and the side surface and operates as an element of mechanical decoupling which blocks any possible delayering of the superficial layers during cutting of the wafer.

Abstract translation: 一种包括电子部件和由侧面限定的边缘区域的半导体器件。 该器件形成在由多个表面层覆盖的半导体材料的衬底中，该多个表面层在边缘区域的顶部形成绝缘层堆叠。 第一凹槽在靠近电子部件的绝缘层堆叠中延伸。 第二凹槽在第一凹槽和侧表面之间的绝缘层堆叠中延伸，并且作为机械去耦元件而工作，其阻止在切割晶片期间表面层的任何可能的延迟。

公开(公告)号：US20030020425A1

公开(公告)日：2003-01-30

申请号：US10205064

申请日：2002-07-25

Applicant: STMICROELECTRONICS S.r.I.

Inventor： Giulio Ricotti

IPC: G05B011/28

CPC classification number: G05B11/28 ,  H02P6/34

Abstract: Herein described is a device for driving electric motors comprising a power stage with a variable duty-cycle coupled to a supply voltage. The power stage is suitable for driving the electric motor. The driving device comprises a circuit that is capable of raising the value of the input voltage of the power stage above the induced counter electromotive voltage of the motor in certain periods of time and a control device capable of activating said circuit in reply to values of the induced counter electromotive voltage greater than or comparable with the supply voltage.

Abstract translation: 这里描述了一种用于驱动电动机的装置，其包括具有耦合到电源电压的可变占空比的功率级。 动力级适用于驱动电动机。 驱动装置包括能够在某段时间内将功率级的输入电压的值提高到电动机的感应反电动势以上的电路，以及能够响应于电压的值而启动所述电路的控制装置 感应反电动势大于或等于电源电压。

公开(公告)号：US20020195882A1

公开(公告)日：2002-12-26

申请号：US10236256

申请日：2002-09-04

Applicant: STMicroelectronics S.r.I.

Inventor： Filippo Marino

IPC: H02J009/00

CPC classification number: H02M1/32 ,  Y10T307/625 ,  Y10T307/826 ,  Y10T307/858 ,  Y10T307/865

Abstract: The method of a protection circuit includes a reference voltage source and at least one circuit which are connected together via a switch. A memory element is connected to the input of the circuit, downstream of the switch. The switch is temporarily opened by a control signal generated by a monostable circuit when detecting switching of power elements belonging to an electronic device embedding the protection circuit. When the switch is open, the memory element supplies the circuit with the reference voltage previously stored. In this way, switching of the power element that might cause noise on the reference voltage cannot disturb the circuit and thereby cannot cause a faulty operation of the latter.

Abstract translation: 保护电路的方法包括参考电压源和经由开关连接在一起的至少一个电路。 存储器元件连接到电路的输入端，在开关的下游。 当检测属于嵌入保护电路的电子设备的功率元件的切换时，开关由单稳电路产生的控制信号暂时打开。 当开关断开时，存储元件为电路提供预先存储的参考电压。 以这种方式，可能导致噪声的功率元件在参考电压上的切换不会干扰电路，从而不会导致电路的故障。

公开(公告)号：US20020189354A1

公开(公告)日：2002-12-19

申请号：US10128133

申请日：2002-04-23

Applicant: STMicroelectronics S.r.I.

Inventor： Guido Spinola Durante ,  Sarah Zerbini ,  Simone Gardella

IPC: G01P015/08

CPC classification number: G01C19/5747

Abstract: The gyroscope is formed by a driving system including a driving mass having an open concave shape; an accelerometer including a sensing mass and comprising mobile sensing electrodes; a linkage connecting the driving mass to the sensing mass. The sensing mass is surrounded on three sides by the driving mass and has a peripheral portion not facing the sensing mass. The mobile sensing electrodes extend integral with the sensing mass from the peripheral portion not facing the driving mass and are interleaved with fixed sensing electrodes. Thereby, there are no passing electrical connections extending below the sensing mass. Moreover the linkage includes springs placed equidistant from the center of gravity of the accelerometer, and the gyroscope is anchored to the substrate with anchoring springs placed equidistant from the center of gravity of the assembly formed by the driving system and by the accelerometer.

Abstract translation: 陀螺仪由包括具有开口凹形状的驱动块的驱动系统形成; 包括感测质量并包括移动感测电极的加速度计; 将驱动质量与感测质量连接的连杆。 感测质量被驱动质量块三面围绕，并且具有不面向感测质量的周边部分。 移动感测电极与来自不面向驱动质量块的周边部分的感测质量一体地延伸并且与固定感测电极交错。 因此，在感测质量下方没有延伸的电连接。 此外，联动装置包括与加速度计的重心等距离的弹簧，并且陀螺仪通过与由驱动系统和加速度计形成的组件的重心等距离的锚定弹簧锚定到基底。

公开(公告)号：US20020186774A1

公开(公告)日：2002-12-12

申请号：US10075087

申请日：2002-02-11

Applicant: STMicroelectronics, S.r.I.

Inventor： Danilo Pau ,  Daniele Alfonso ,  Fabrizio Basso ,  Emiliano Piccinelli ,  Alessandro Cremonesi

IPC: H04N007/12

CPC classification number: H04N19/59 ,  H04N19/40 ,  H04N19/48 ,  H04N19/90

Abstract: A process and a system is described for generating an MPEG output bitstream starting from an MPEG input bitstream. The output bitstream has a resolution modified with respect to the resolution of the input bitstream. -In the input bitstream, first portions that substantially do not affect and second portions that do affect resolution variation are distinguished. The second portions are then subjected to a function of modification of the resolution obtained by filtering the second portions in a domain of the discrete cosine transform, and then are transferred to the output bitstream. A corresponding computer program product is also provided.

Abstract translation: 描述了从MPEG输入比特流开始生成MPEG输出比特流的过程和系统。 输出比特流具有关于输入比特流的分辨率修改的分辨率。 - 在输入比特流中，区分基本上不影响的第一部分和确实影响分辨率变化的第二部分。 然后对第二部分进行通过对离散余弦变换的域中的第二部分进行滤波而获得的分辨率的修改的功能，然后被传送到输出比特流。 还提供了相应的计算机程序产品。

公开(公告)号：US20020163848A1

公开(公告)日：2002-11-07

申请号：US10124494

申请日：2002-04-17

Applicant: STMicroelectronics S.r.I.

Inventor： Giuseppe GRASSO

IPC: G11C008/00

CPC classification number: G11C11/40615 ,  G11C7/1018 ,  G11C7/1045 ,  G11C11/406

Abstract: A random access memory (RAM) includes at least two memory banks. Each memory bank includes an array of dynamic random access memory (DRAM) cells, and self-refresh circuits for continuously submitting the DRAM cells to a refresh operation independent of the other memory banks. A first circuit selectively accesses one of the memory banks in response to an external access request. A second circuit suspends the refresh operation in the accessed memory bank while processing the external access request, and while the refresh operations in non-selected memory banks are not suspended.

Abstract translation: 随机存取存储器（RAM）包括至少两个存储体。 每个存储体包括动态随机存取存储器（DRAM）单元阵列和用于连续地将DRAM单元提交到独立于其它存储体的刷新操作的自刷新电路。 第一电路响应于外部访问请求选择性地访问存储体之一。 第二电路在处理外部访问请求时以及在未选择的存储体中的刷新操作不被暂停的情况下暂停在所访问的存储体中的刷新操作。

公开(公告)号：US20020163376A1

公开(公告)日：2002-11-07

申请号：US10050427

申请日：2002-01-15

Applicant: STMicroelectronics S.r.I.

Inventor： Domenico Pappalardo ,  Maurizio Gaibotti ,  Gaetano Palumbo ,  Antonino Conte ,  Stefano Lo Giudice

IPC: G05F001/10

CPC classification number: H02M3/07 ,  H02M2003/077

Abstract: A variable charge pump contains several individual simple charge pumps, each with a pumping capacitor and a switching mechanism. Additionally, a switching network is coupled to the individual charge pumps so that the different lines in the charge pump can be connected together in a serial mode or parallel mode (or mixed serial and parallel modes) to match the needs of the output load. The switching network is easily changed to provide the necessary driving capability as the needs of the output load changes.

Abstract translation: 可变电荷泵包含几个单独的简单电荷泵，每个具有泵浦电容器和开关机构。 此外，开关网络耦合到各个电荷泵，使得电荷泵中的不同线路可以以串行模式或并行模式（或混合串行和并行模式）连接在一起以匹配输出负载的需要。 随着输出负载的变化需要，开关网络容易改变以提供必要的驱动能力。

公开(公告)号：US20020152407A1

公开(公告)日：2002-10-17

申请号：US10010738

申请日：2001-11-05

Applicant: STMicroelectronics S.r.I.

Inventor： Michele Alia ,  Michele Carrano ,  Carmello Pistritto

IPC: G06F001/26

CPC classification number: G06F1/3243 ,  G06F1/3203 ,  G06F1/3287 ,  Y02D10/152 ,  Y02D10/171 ,  Y02D50/20

Abstract: A system-on-chip (SOC) includes a power down circuit. Within the SOC are several circuit blocks, each of them operating responsive to a local clock signal. A system clock is coupled to the circuit blocks for providing a system clock signal that functions as the local clock signal for selected circuit blocks. A power control manager provides a signal that at least partially determines whether the system clock will act as the local clock for some of the circuit blocks. Within the circuit blocks is a shutdown circuit that selectively prevents the system clock signal from functioning as the local clock signal in those circuit blocks that receive the shutdown signal, but the shutdown circuit only operates after both the signal to shutdown is received from the power control manager and after the circuit block has, in fact, shutdown.

Abstract translation: 片上系统（SOC）包括掉电电路。 SOC内部有几个电路块，每个电路块响应于本地时钟信号而工作。 系统时钟耦合到电路块，用于提供用作所选电路块的本地时钟信号的系统时钟信号。 功率控制管理器提供至少部分地确定系统时钟是否将用作一些电路块的本地时钟的信号。 在电路块内是关闭电路，其选择性地防止系统时钟信号作为接收关闭信号的那些电路块中的本地时钟信号起作用，但是关闭电路仅在从功率控制器接收到关闭信号 经理和电路块实际上已经关闭。

公开(公告)号：US20020140507A1

公开(公告)日：2002-10-03

申请号：US10075161

申请日：2002-02-13

Applicant: STMicroelectronics S.r.I.

Inventor： Pietro Filoramo ,  Tiziano Chiarillo

IPC: H03F003/45

CPC classification number: H03G7/08

Abstract: A variable gain amplifier is described which comprises a first device to which a first control signal (Vc, Vc1) is applied so that the gain (Ai1, Ai) of an output signal (iout, io) of the first device (11, 22, Q45-Q48) with respect to a first input signal (in, i1, ir) is a function of the exponential type of the first control signal (Vc, Vc1). The amplifier comprises a feedback network (25, Q51-Q58) connected between an output terminal and an input terminal of the first device (22, Q45-Q48) so as to assure that the gain (Ai) in decibel of the first device (22, Q45-Q48) is a linear function of the first control signal (Vc1). (FIG. 2)

Abstract translation: 描述了一种可变增益放大器，其包括第一装置，第一装置施加第一控制信号（Vc，Vc1），使得第一装置（11,22）的输出信号（iout，io）的增益（Ai1，Ai） 相对于第一输入信号（in，i1，ir），Q45-Q48是第一控制信号（Vc，Vc1）的指数类型的函数。 放大器包括连接在第一装置（22，Q45-Q48）的输出端子和输入端子之间的反馈网络（25，Q51-Q58），以便确保第一装置的分贝的增益（Ai）（ 22，Q45-Q48）是第一控制信号（Vc1）的线性函数。 （图2）

公开(公告)号：US20020130334A1

公开(公告)日：2002-09-19

申请号：US10036088

申请日：2001-12-28

Applicant: STMicroelectronics, S.r.I.

Inventor： Roberto Gastaldi ,  Gianbattsista Lo Giudice ,  Marco Pasotti ,  Federico Pio

IPC: H01L031/072

CPC classification number: G11C16/102

Abstract: An electrically-modifiable, non-volatile, semiconductor memory comprising a plurality of user memory locations which can be addressed individually from outside the memory in order to read and to modify the data held therein is characterized in that, for each user memory location, there is a corresponding pair of physical memory locations in the memory, which assume, alternatively, the functions of an active memory location and of a non-active memory location, the active memory location containing a previously-written datum and the non-active memory location being available for the writing of a new datum to replace the previously-written datum, so that, upon a request to replace the previous datum with the new datum, the previous datum is kept in the memory until the new datum has been written.

Abstract translation: 一种可电气修改的非易失性半导体存储器，其包括多个用户存储器位置，其可以从存储器外部单独寻址以便读取和修改其中保存的数据，其特征在于，对于每个用户存储器位置， 存储器中的对应物理存储器位置对，其替代地假设有效存储器位置和非活动存储器位置的功能，所述活动存储器位置包含预先写入的数据和非活动存储器位置 可用于写入新的数据以替换以前写入的数据，以便在要求使用新数据替换以前的数据时，先前的数据保存在存储器中，直到新的数据被写入。