Abstract:
An apparatus and method for pairing a base and a detachable device. A query module queries a detachable device in response to the detachable device connecting to a base. The detachable device provides a display for the base if the detachable device and base are connected. A determination module determines if the detachable device is paired with the base. A credential module obtains a pairing credential for a pairing in response to the determination module determining that the detachable device is unpaired with the base.
Abstract:
A demodulating method and a demodulating apparatus at a receiver based on a downlink transmit diversity mode in a LTE system are provided by the present invention. The method includes: dividing received data from sub-carriers of each receiving antenna based on a transmit diversity mode into multiple groups of received data according to numbers of antennas of a transmitter and a receiver; performing an independent demodulation on each group of the multiple groups of received data separately according to a demodulation algorithm of two-port transmitting and single-port receiving, so as to obtain a corresponding group of demodulated data; and for multiple groups of demodulated data corresponding to same transmitted data, performing a maximum ratio combination on the multiple groups of demodulated data according to a channel condition corresponding to each group of the multiple groups of demodulated data, so as to obtain a corresponding final demodulated data value. The demodulating method and the demodulating apparatus of the present invention can ensure the performance of the system adopting the diversity algorithm in situations of various kinds of antenna configurations, reduce cost and the complexity of devices in a practical application, and is very easy for project implementation.
Abstract:
The present invention extends to methods, systems, and computer program products for hierarchically disassembling messages. The functionality of disassemblers and framers is decoupled such that framers for different types of messages can be utilized at the same level in a hierarchy without having to also change disassemblers. Virtually any level of disassembly is possible to address any corresponding level of message nesting. Disassembly can be performed on a per message or per session basis.
Abstract:
A system for self-correcting the multiphase clock includes a transmitter, a receiver, a random code generator and a controller. The random code generator generates a random code stream, the random code stream is transformed to the high-speed serial data by the transmitter, the high-speed serial data are sent into the receiver and transformed to the parallel data by the receiver, the parallel data are sent into the controller, the controller stores the random code stream and detects the probability of the bit error of the parallel data output by the receiver. According to the test result of the bit error, the controller generates a phase adjustment control signal for adjusting the phase uniformity of the multiphase clock. Also, a method for self-correcting the phase uniformity of the multiphase clock of the present invention effectively makes up the sampling bit errors caused by the phase nonuniformity of the multiphase clock.
Abstract:
The invention is drawn to novel macrolide compounds of formula I having antibiotic and antineoplastic activities, useful as medicaments and/or agrochemicals for microorganism infections, in particularly for infectious diseases involving drug-resistant Staphylococcus, and for treatment of human and animal cancers.
Abstract:
An analog access circuit for characterizing chalcogenide memory cells is disclosed. The analog access circuit includes an analog access control module, an address and data control module, and an analog cell access and current monitoring module. The analog access control module selectively controls whether a normal memory access or an analog memory access should be performed on a specific chalcogenide memory cell. The address and data control module allows a normal memory access to the chalcogenide memory cell according to an input address. The analog cell access and current monitoring module performs an analog memory access to the chalcogenide memory cell according to the input address, and monitors a reference current from a sense amplifier associated with the chalcogenide memory cell.