公开(公告)号：US20120284498A1

公开(公告)日：2012-11-08

申请号：US13463114

申请日：2012-05-03

Applicant: Cheng-Yen Chou

Inventor： Cheng-Yen Chou

IPC: G06F15/177

CPC classification number: G06F9/4401 ,  G06F12/0638

Abstract: A flash device and a booting method thereof are provided. The booting method includes following steps: executing a basic boot program stored in a read only memory (ROM) of a flash memory micro-controller; reading a specific flash memory configuration parameter and a revision program from a flash memory; loading a main program stored in the flash memory; and executing the revision program and loading the main program stored in the flash memory when the main program fails to be loaded.

Abstract translation: 提供闪光灯装置及其引导方法。 引导方法包括以下步骤：执行存储在闪速存储器微控制器的只读存储器（ROM）中的基本引导程序; 从闪存读取特定的闪存配置参数和修订程序; 加载存储在闪存中的主程序; 并且当主程序无法加载时，执行修订程序并加载存储在闪存中的主程序。

公开(公告)号：US20100149002A1

公开(公告)日：2010-06-17

申请号：US12632680

申请日：2009-12-07

Applicant: Ming-Hui Chiu

Inventor： Ming-Hui Chiu

IPC: H03M5/00

CPC classification number: H03M7/04

Abstract: The invention relates to a method for converting a voltage identification code includes the steps as follows. A special binary code range is obtained, and N special voltage identification codes corresponding to a special command are converted to N special binary codes under a converting relation, and the N special binary codes are used as the special binary code range. A first voltage identification code is converted to a corresponding first binary code under the converting relation. In addition, the first binary code and a first preset value are used to compute to obtain a second binary code, and the second binary code is not in the special binary code range.

Abstract translation: 本发明涉及一种转换电压识别码的方法，包括以下步骤。 获得特殊的二进制代码范围，并将与特殊命令相对应的N个特殊电压识别代码转换为转换关系下的N个特殊二进制代码，并将N个特殊二进制代码用作特殊的二进制代码范围。 第一电压识别码在转换关系下转换为对应的第一二进制码。 此外，第一二进制码和第一预设值用于计算以获得第二二进制码，并且第二二进制码不在特殊的二进制码范围内。

公开(公告)号：US20060050463A1

公开(公告)日：2006-03-09

申请号：US11132264

申请日：2005-05-19

Applicant: Chih-Jen Hung ,  Hsu-Huang Cheng ,  Tsorng-Yang Mei

Inventor： Chih-Jen Hung ,  Hsu-Huang Cheng ,  Tsorng-Yang Mei

IPC: H02H7/00

CPC classification number: G06F1/206 ,  G01K7/20

Abstract: A heat detector for a main board at least comprises a current generation unit, a heat perception element, and an analog to digital converter (ADC). The current generation unit generates at least one current signal. The heat perception element electrically connects to the current generation unit and generates an analog signal according to the current signal. The ADC electrically connects to the current generation unit and the heat perception element. The ADC is for converting the analog signal into a digital signal.

Abstract translation: 用于主板的热检测器至少包括电流产生单元，热感知元件和模数转换器（ADC）。 当前一代单元产生至少一个电流信号。 热感知元件电连接到电流产生单元并根据电流信号产生模拟信号。 ADC电连接到电流发生单元和热感知元件。 ADC用于将模拟信号转换为数字信号。

公开(公告)号：US11494430B2

公开(公告)日：2022-11-08

申请号：US16441032

申请日：2019-06-14

Applicant: ASMedia Technology Inc.

Inventor： Wei-Kan Hwang

IPC: G06F9/00 ,  G06F16/58 ,  G06N3/08 ,  G06F9/46 ,  G06K9/62 ,  G06F16/53

Abstract: A data storage apparatus and a data prediction method thereof are provided. The data storage apparatus includes a memory unit and a prediction unit. The prediction unit acquires a plurality of access location data of a plurality of data access actions of a prior access history of the memory unit. The prediction unit analyzes the prior access history of the memory unit. The prediction unit performs a quantification process on the access location data to acquire a plurality of quantized data corresponding to the prior access history. The prediction unit predicts a data pre-accessing target of the memory unit according to the quantized data.

公开(公告)号：US10417164B2

公开(公告)日：2019-09-17

申请号：US15848553

申请日：2017-12-20

Applicant: ASMedia Technology Inc.

Inventor： Chin-Lung Wu ,  Wei-Yun Chang

IPC: G06F13/42 ,  G06F13/28 ,  G06F13/38 ,  G06F13/40

Abstract: A synchronous transmission device includes a first communication port, a first bus instance and a second bus instance. The first communication port is connected to the first endpoint and the second endpoint. The first bus instance executes a first data transmission with the first endpoint according to a first node of a first schedule list. The first node corresponds to the first endpoint, and the first bus instance corresponds to the first communication port. When the first data transmission is executed, the first bus instance is further configured to determine whether the second bus instance is idle. When the second bus instance is idle, the first bus instance controls the second bus instance to execute a second data transmission with the second endpoint according to a second node of the first schedule list. The second node of the first schedule list corresponds to the second endpoint.

公开(公告)号：US10198395B2

公开(公告)日：2019-02-05

申请号：US15643495

申请日：2017-07-07

Applicant: ASMedia Technology Inc.

Inventor： Wei-Kan Hwang

IPC: G06F13/36 ,  G06F13/42

Abstract: A port multiplier system is provided. The port multiplier system comprises a first port multiplier and a second port multiplier. The first port multiplier is configured to receive a plurality of first frame information structures from a host. Each of the first frame information structure corresponds to a first port multiplier port number. The first port multiplier sends the first frame information structures that correspond to the first port multiplier port numbers, respectively, to a first downstream port of the first port multiplier according to first port multiplier port number. The second port multiplier is configured to send the first frame information structures that are sent to the first downstream port to a plurality of second downstream ports of the second port multiplier, respectively. An operation method is also provided.

公开(公告)号：US09465556B2

公开(公告)日：2016-10-11

申请号：US14273528

申请日：2014-05-08

Applicant: ASMedia Technology Inc.

Inventor： Ming-Hui Chiu ,  Chia-Hsin Chen ,  Yung-Chi Hwang

IPC: G06F13/00 ,  G06F3/06 ,  G06F11/00

CPC classification number: G06F3/0659 ,  G06F3/0604 ,  G06F3/061 ,  G06F3/0689 ,  G06F11/00 ,  G06F2003/0692 ,  G06F2212/262

Abstract: A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system is a redundancy array of independent disk 0 (RAID 0) system. The disk array system includes a plurality of disks. The data processing method includes: receiving a reading command; determining whether to divide the reading command to a plurality of reading command segments according to the reading command; and assigning the reading command to a corresponding disk of the disks to read data stored in the corresponding disk accordingly when it is determined that the reading command is not divided.

Abstract translation: 提供了磁盘阵列系统和数据处理方法。 数据处理方法应用于磁盘阵列系统。 磁盘阵列系统是独立磁盘0（RAID 0）系统的冗余阵列。 磁盘阵列系统包括多个磁盘。 数据处理方法包括：接收读取命令; 根据读取命令确定是否将读取命令划分为多个读取命令段; 以及当确定所述读取命令未被划分时，将所述读取命令分配给所述盘的相应盘以相应地读取存储在所述对应盘中的数据。

公开(公告)号：US09459811B2

公开(公告)日：2016-10-04

申请号：US14273539

申请日：2014-05-08

Applicant: ASMedia Technology Inc.

Inventor： Ming-Hui Chiu ,  Chia-Hsin Chen ,  Yung-Chi Hwang ,  Ching-Fa Hsiao

IPC: G06F3/06

CPC classification number: G06F3/0659 ,  G06F3/0613 ,  G06F3/0617 ,  G06F3/065 ,  G06F3/0689 ,  G06F2003/0692

Abstract: A disk array system and a data processing method are provided. The data processing method is applied to the disk array system. The disk array system includes a first disk and a second disk. The data processing method includes: receiving a reading command, wherein the reading, command includes a data starting address; determining to assign the reading command to the first disk or the second disk according to the data starting address of the reading command and a stripe size; and reading corresponding data according to the reading command from the first disk or the second disk which receives the reading command.

Abstract translation: 提供了磁盘阵列系统和数据处理方法。 数据处理方法应用于磁盘阵列系统。 磁盘阵列系统包括第一磁盘和第二磁盘。 数据处理方法包括：接收读取命令，其中读取命令包括数据起始地址; 确定根据读取命令的数据起始地址和条带大小将读取命令分配给第一盘或第二盘; 以及根据从接收到读取命令的第一盘或第二盘读取命令读取相应数据。

公开(公告)号：US20160135291A1

公开(公告)日：2016-05-12

申请号：US14932944

申请日：2015-11-04

Applicant: Hsin-Ting Liu ,  Ming-Jen Lin ,  Chun-Hung Chen

Inventor： Hsin-Ting Liu ,  Ming-Jen Lin ,  Chun-Hung Chen

IPC: H05K1/02 ,  H05K1/11

CPC classification number: H05K1/117 ,  H05K1/0253 ,  H05K2201/093 ,  H05K2201/09345 ,  H05K2201/094

Abstract: A printed circuit board structure includes a main body and a connecting interface. The connecting interface connects and is located at a side of the main body. The connecting interface includes conductive layers and insulation layers. The conductive layers at least include a first, a second, a third, a fourth conductive layer. The insulation layers at least include a first, a second, a third insulation layers. The insulation layers and the conductive layers are alternately disposed. The first insulation layer is located between the first conductive layer and the second conductive layer. The first conductive layer and the second conductive layer are partially overlapped in their orthographic projections on the first insulation layer. The second insulation layer is located between the second conductive layer and the third conductive layer. The third insulation layer is located between the third conductive layer and the fourth conductive layer.

Abstract translation: 印刷电路板结构包括主体和连接界面。 连接接口连接并位于主体的一侧。 连接界面包括导电层和绝缘层。 导电层至少包括第一，第二，第三，第四导电层。 绝缘层至少包括第一绝缘层，第二绝缘层，第二绝缘层。 绝缘层和导电层交替设置。 第一绝缘层位于第一导电层和第二导电层之间。 第一导电层和第二导电层在其第一绝缘层上的正投影部分重叠。 第二绝缘层位于第二导电层和第三导电层之间。 第三绝缘层位于第三导电层和第四导电层之间。

公开(公告)号：US09330038B2

公开(公告)日：2016-05-03

申请号：US14106869

申请日：2013-12-16

Applicant: ASMedia Technology Inc.

Inventor： Yang-Chen Liu ,  Hui-Yu Tang ,  Li-Feng Kuo

IPC: G06F13/00 ,  G06F13/362 ,  G06F13/38 ,  G06F13/40

CPC classification number: G06F13/3625 ,  G06F13/385 ,  G06F13/4022

Abstract: The bandwidth allocation apparatus includes a high bandwidth arbitration module, a low bandwidth arbitration module and a multiplexer. The high bandwidth arbitration module is used to select one downstream device from the high bandwidth downstream device group for allowing uplink. The low bandwidth arbitration module is used to select one downstream device from the low bandwidth downstream device group for allowing uplink. The multiplexer selects the one of the access requests from the high bandwidth arbitration module or the low bandwidth arbitration module for allowing to uplink the access request to an upstream device. The access transmission times of the high bandwidth arbitration module and the low bandwidth arbitration module are counted respectively by a counting circuit.

Abstract translation: 带宽分配装置包括高带宽仲裁模块，低带宽仲裁模块和多路复用器。 高带宽仲裁模块用于从高带宽下游设备组中选择一个下行设备，以允许上行链路。 低带宽仲裁模块用于从低带宽下游设备组中选择一个下行设备，以允许上行链路。 多路复用器选择来自高带宽仲裁模块或低带宽仲裁模块的访问请求中的一个，以允许向上游设备上行接入请求。 高带宽仲裁模块和低带宽仲裁模块的接入传输时间分别由计数电路计数。