公开(公告)号：US07944754B2

公开(公告)日：2011-05-17

申请号：US12347876

申请日：2008-12-31

申请人： Raul-Adrian Cernea

发明人： Raul-Adrian Cernea

IPC分类号： G11C11/34

CPC分类号： G11C16/26 ,  G11C11/5642 ,  G11C16/32

摘要： A page of non-volatile multi-level memory cells on a word line is sensed in parallel by sense amps via bit lines. A predetermined input sensing voltage as an increasing function of time applied to the word line allows scanning of the entire range of thresholds of the memory cell in one sweep. Sensing of the thresholds of individual cells is then reduced to a time-domain sensing by noting the times the individual cells become conducting. Each conducting time, adjusted for delays in the word line and the bit line, can be used to derive the sensing voltage level that developed at the word line local to the cell when the cell became conducting. The locally developed sensing voltage level yields the threshold of the cell. This time-domain sensing is relative insensitive to the number of levels of a multi-level memory and therefore resolve many levels rapidly in one sweep.

摘要翻译： 通过位线通过感测放大器并行地感测字线上的非易失性多级存储器单元的页面。 作为施加到字线的时间的增加函数的预定输入感测电压允许在一次扫描中扫描存储器单元的整个阈值范围。 然后通过注意个体细胞导通的时间，将个体细胞的阈值的感测减少到时域感测。 可以使用针对字线和位线的延迟进行调整的每个导通时间，以导出在单元变为导通时在单元的局部字线处产生的感测电压电平。 本地开发的感测电压电平产生电池的阈值。 该时域感测对于多级存储器的级别的数量是相对不敏感的，因此在一次扫描中快速解析许多级别。

公开(公告)号：US07934049B2

公开(公告)日：2011-04-26

申请号：US11317341

申请日：2005-12-22

申请人： Micky Holtzman ,  Hagai Bar-El ,  Ronen Greenspan ,  Rony Shapiro

发明人： Micky Holtzman ,  Hagai Bar-El ,  Ronen Greenspan ,  Rony Shapiro

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F12/0246 ,  G06F12/1408 ,  G06F21/10 ,  G06F21/78 ,  G06F2212/2022 ,  G06F2221/2107

摘要： A device with mass storage capability that uses a readily available non secure memory for the mass storage but has firmware (and hardware) that provides security against unauthorized copying of data. This is true even though the firmware itself is stored in the non secure mass storage memory, and therefore potentially vulnerable to hacking. An indication of the authenticity of the firmware must be present before it will be executed by the device. This protects the device contents from unauthorized duplication or tampering. Additional functionality can be added to the device with additional firmware applications, and the authenticity of those additional applications will also be verified before they will be executed. This further prevents unauthorized copying or tampering of secure content through any mechanisms that may be unscrupulously introduced. Any data within the mass storage memory may also be encrypted.

摘要翻译： 具有大容量存储能力的设备使用容易获得的用于大容量存储的非安全存储器，但是具有提供针对未经授权的数据复制的安全性的固件（和硬件）。 即使固件本身存储在非安全大容量存储器中也是如此，因此可能易受黑客攻击。 必须在固件执行之前存在固件的真实性的指示。 这样可以保护设备内容免受未经授权的重复或篡改。 额外的功能可以添加到具有附加固件应用程序的设备，这些附加应用程序的真实性也将在执行前被验证。 这进一步防止了通过可能被无耻地引入的任何机制来非法复制或篡改安全内容。 大容量存储器内的任何数据也可以被加密。

公开(公告)号：US20110090741A1

公开(公告)日：2011-04-21

申请号：US12967227

申请日：2010-12-14

申请人： Tomoharu Tanaka ,  Jian CHEN

发明人： Tomoharu Tanaka ,  Jian CHEN

IPC分类号： G11C16/10

CPC分类号： G11C11/5628 ,  G11C11/5642 ,  G11C16/0483 ,  G11C16/10 ,  G11C16/12 ,  G11C16/34 ,  G11C16/3418 ,  G11C16/3427 ,  G11C16/3459 ,  G11C16/3481 ,  G11C2211/5621 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： A non-volatile semiconductor memory device includes an electrically data rewritable non-volatile semiconductor memory cell and a write circuit for writing data in the memory cell, the write circuit writing a data in the memory cells by supplying a write voltage Vpgm and a write control voltage VBL to the memory cell, continuing the writing of the data in the memory cell by changing the value of the write control voltage VBL in response to an advent of a first write state of the memory cell and inhibiting any operation of writing a data to the memory cell by further changing the value of the write control voltage VBL to Vdd in response to an advent of a second write state of the memory cell.

摘要翻译： 非易失性半导体存储器件包括电数据可重写非易失性半导体存储单元和用于在存储单元中写入数据的写入电路，写入电路通过提供写入电压Vpgm和写入控制将数据写入存储单元 电压VBL到存储器单元，响应于存储单元的第一写入状态的到来改变写入控制电压VBL的值，继续写入存储单元中的数据，并且禁止写入数据的任何操作 该存储单元响应于存储单元的第二写入状态的进入而进一步将写入控制电压VBL的值改变为Vdd。

公开(公告)号：US07926720B2

公开(公告)日：2011-04-19

申请号：US12166533

申请日：2008-07-02

申请人： Reuven Elhamias ,  Andrew Tomlin ,  Wesley G. Brewer ,  Yosi Pinto ,  Micky Holtzman

发明人： Reuven Elhamias ,  Andrew Tomlin ,  Wesley G. Brewer ,  Yosi Pinto ,  Micky Holtzman

IPC分类号： G06K7/08

CPC分类号： G06F3/0607 ,  G06F3/0632 ,  G06F3/0679 ,  G06F13/385 ,  Y02D10/14 ,  Y02D10/151

摘要： A memory card that adapts its operation according to the application to which it applied or the conditions under which it is operated. This allows the card to dynamical self optimize. In a first set of embodiments, the card uses host profiling where it will learn about the host during host-card interactions and the card's controller will optimize its algorithms accordingly. In another set of embodiments, the host and card will report to one another their capabilities for a quality of service negotiation. A further set of embodiments allows the storage device to memorize access sequences issued by the host under various predefined conditions, such as host reset or a power on boot sequence. The storage device can use this information to optimize operation for the expected commands. On deviation from an expected sequence, the device would memorize the new command sequence and save it, thus operating in a self-adaptive manner.

摘要翻译： 一种存储卡，根据其应用的应用或操作条件来适应其操作。 这样可以让卡片进行动态自我优化。 在第一组实施例中，卡使用主机分析，其中将在主机卡交互期间了解主机，并且卡的控制器将相应地优化其算法。 在另一组实施例中，主机和卡将彼此报告其服务质量协商的能力。 另一组实施例允许存储设备在诸如主机复位或引导顺序的电源的各种预定条件下存储由主机发出的访问序列。 存储设备可以使用该信息来优化预期命令的操作。 在偏离预期序列时，设备将记忆新的命令序列并保存，从而以自适应的方式运行。

公开(公告)号：US07917949B2

公开(公告)日：2011-03-29

申请号：US11314522

申请日：2005-12-21

申请人： Kevin M. Conley

发明人： Kevin M. Conley

IPC分类号： H04L9/32 ,  G06F12/00 ,  G06F13/28

CPC分类号： G06F21/32 ,  G06F21/79

摘要： A portable memory storage device (“device”) is provided. The device includes a microphone for receiving a user voice input; a controller that receives the voice input and creates a template; and a plurality of non-volatile memory cells for storing the template, wherein the template is used to authenticate the user for any subsequent user request for accessing the device and an application is launched when the device interfaces with a host system to enroll the user as an authorized user to access device functionality and/or access host system functionality.

摘要翻译： 提供了便携式存储器存储设备（“设备”）。 该设备包括用于接收用户语音输入的麦克风; 接收语音输入并创建模板的控制器; 以及用于存储该模板的多个非易失性存储器单元，其中该模板用于对任何用于访问设备的后续用户请求认证用户，并且当该设备与主机系统接口以将该用户注册为 授权用户访问设备功能和/或访问主机系统功能。

公开(公告)号：US07917697B2

公开(公告)日：2011-03-29

申请号：US11769099

申请日：2007-06-27

申请人： Paul McAvoy ,  Fabrice Jogand-Coulomb ,  Pascal Caillon ,  Benjamin Vigier ,  Chieh-Hao Yang

发明人： Paul McAvoy ,  Fabrice Jogand-Coulomb ,  Pascal Caillon ,  Benjamin Vigier ,  Chieh-Hao Yang

IPC分类号： G06F13/00

CPC分类号： G06F9/44505

摘要： A portable flash memory storage device such as a memory card can configure a host device upon insertion. The configuration may specify applications or other sequences of operations to be executed by the host upon insertion of the card. Files on the card may be associated with an appropriate application and then automatically opened with the appropriate application. A secure configuration may override a more freely modifiable configuration in certain embodiments.

摘要翻译： 诸如存储卡的便携式闪存存储设备可以在插入时配置主机设备。 配置可以指定在插入卡时由主机执行的应用或其他操作序列。 卡上的文件可能与适当的应用程序相关联，然后自动打开相应的应用程序。 在某些实施例中，安全配置可以覆盖更可自由修改的配置。

公开(公告)号：US07917686B2

公开(公告)日：2011-03-29

申请号：US11616228

申请日：2006-12-26

申请人： Alan W. Sinclair ,  Barry Wright

发明人： Alan W. Sinclair ,  Barry Wright

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0679

摘要： Data files are assigned addresses within one or more logical blocks of a continuous logical address space interface (LBA interface) of a usual type of flash memory system with physical memory cell blocks. This assignment may be done by the host device which typically, but not necessarily, generates the data files. The number of logical blocks containing data of any one file is controlled in a manner that reduces the amount of fragmentation of file data within the physical memory blocks, thereby to maintain good memory performance. The host may configure the logical blocks of the address space in response to learning the physical characteristics of a memory to which it is connected.

摘要翻译： 数据文件在具有物理存储器单元块的通常类型的闪存系统的连续逻辑地址空间接口（LBA接口）的一个或多个逻辑块内被分配地址。 该分配可以由主机设备完成，主机设备通常但不一定生成数据文件。 以减少物理存储器块内的文件数据的分段量的方式控制包含任何一个文件的数据的逻辑块的数量，从而保持良好的存储器性能。 响应于学习与其连接的存储器的物理特性，主机可以配置地址空间的逻辑块。

公开(公告)号：US07916552B2

公开(公告)日：2011-03-29

申请号：US12763569

申请日：2010-04-20

申请人： Daniel C. Guterman ,  Stephen J. Gross ,  Shazad Khalid ,  Geoffrey S. Gongwer

发明人： Daniel C. Guterman ,  Stephen J. Gross ,  Shazad Khalid ,  Geoffrey S. Gongwer

IPC分类号： G11C16/04

CPC分类号： G11C16/26 ,  G11C11/5621 ,  G11C16/349

摘要： Tracking cells are used in a memory system to improve the read process. The tracking cells can provide an indication of the quality of the data and can be used as part of a data recovery operation if there is an error. The tracking cells provide a means to adjust the read parameters to optimum levels in order to reflect the current conditions of the memory system. Additionally, some memory systems that use multi-state memory cells will apply rotation data schemes to minimize wear. The rotation scheme can be encoded in the tracking cells based on the states of multiple tracking cells, which is decoded upon reading.

摘要翻译： 在存储器系统中使用跟踪单元来改善读取过程。 跟踪单元可以提供数据质量的指示，如果存在错误，可以将其用作数据恢复操作的一部分。 跟踪单元提供了将读取参数调整到最佳水平以便反映存储器系统的当前状况的手段。 另外，使用多状态存储器单元的一些存储器系统将应用旋转数据方案以最小化磨损。 可以基于多个跟踪单元的状态在跟踪单元中编码旋转方案，该单元在读取时被解码。

公开(公告)号：US07911849B2

公开(公告)日：2011-03-22

申请号：US12757833

申请日：2010-04-09

申请人： Gerrit Jan Hemink

发明人： Gerrit Jan Hemink

IPC分类号： G11C16/04

CPC分类号： G11C16/0483 ,  G11C11/5628 ,  G11C16/3404

摘要： A soft programming pre-charge voltage provides boosting control during soft programming operations for non-volatile memory devices. A pre-charge voltage can be applied to the word lines of a block of memory cells to enable pre-charging of the channel region of a NAND string to be inhibited from soft programming. The level of boosting in the channel region of the inhibited NAND string is governed by the pre-charge voltage and the soft programming voltage. By controlling the pre-charge voltage, more reliable and consistent channel boosting can be achieved. In one embodiment, the pre-charge voltage is increased between applications of the soft programming voltage to reduce or eliminate a rise in the channel's boosted potential. In one embodiment, the soft programming pre-charge voltage level(s) is determined during testing that is performed as part of a manufacturing process.

摘要翻译： 软编程预充电电压在非易失性存储器件的软编程操作期间提供升压控制。 可以将预充电电压施加到一块存储器单元的字线，以使得能够预先对NAND串的通道区进行预编程以禁止软编程。 被禁止的NAND串的通道区域中的升压电平由预充电电压和软编程电压控制。 通过控制预充电电压，可以实现更可靠和一致的通道增压。 在一个实施例中，在应用软编程电压之间增加预充电电压以减少或消除通道的升压电位的上升。 在一个实施例中，软编程预充电电压电平在作为制造过程的一部分执行的测试期间被确定。

公开(公告)号：US07910434B2

公开(公告)日：2011-03-22

申请号：US12567257

申请日：2009-09-25

申请人： Henry Chien ,  George Matamis ,  Tuan Pham ,  Masaaki Higashitani ,  Hidetaka Horiuchi ,  Jeffrey W. Lutze ,  Nima Mokhlesi ,  Yupin Kawing Fong

发明人： Henry Chien ,  George Matamis ,  Tuan Pham ,  Masaaki Higashitani ,  Hidetaka Horiuchi ,  Jeffrey W. Lutze ,  Nima Mokhlesi ,  Yupin Kawing Fong

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L21/28273 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/7881

摘要： A nonvolatile memory array includes floating gates that have an inverted-T shape in cross section along a plane that is perpendicular to the direction along which floating cells are connected together to form a string. Adjacent strings are isolated by shallow trench isolation structures.

摘要翻译： 非易失性存储器阵列包括沿着垂直于浮动单元连接在一起以形成串的方向的平面的横截面具有倒T形的浮动栅极。 相邻的串由浅沟槽隔离结构隔离。