公开(公告)号：US08438338B2

公开(公告)日：2013-05-07

申请号：US12856682

申请日：2010-08-15

Applicant: Diane Garza Flemming ,  William A. Maron ,  Ram Raghavan ,  Mysore Sathyanarayana Srinivas ,  Basu Vaidyanathan

Inventor： Diane Garza Flemming ,  William A. Maron ,  Ram Raghavan ,  Mysore Sathyanarayana Srinivas ,  Basu Vaidyanathan

IPC: G06F12/02

CPC classification number: G06F12/0811 ,  G06F12/0284 ,  G06F2212/502 ,  G06F2212/604

Abstract: An approach is provided to identifying cache extension sizes that correspond to different partitions that are running on a computer system. The approach extends a first hardware cache associated with a first processing core that is included in the processor's silicon substrate with a first memory allocation from a system memory area, with the system memory area being external to the silicon substrate and the first memory allocation corresponding to one of the plurality of cache extension sizes that corresponds to one of the partitions that is running on the computer system. The approach further extends a second hardware cache associated with a second processing core also included in the processor's silicon substrate with a second memory allocation from the system memory area with the second memory allocation corresponding to another of the cache extension sizes that corresponds to a different partitions that is being executed by the second processing core.

Abstract translation: 提供了一种方法来识别对应于在计算机系统上运行的不同分区的高速缓存扩展大小。 该方法利用来自系统存储器区域的第一存储器分配来扩展与包括在处理器的硅衬底中的第一处理核心相关联的第一硬件高速缓存，系统存储器区域在硅衬底外部，并且第一存储器分配对应于 多个缓存扩展大小中的一个对应于在计算机系统上运行的分区之一。 该方法进一步扩展与第二处理核心相关联的第二硬件高速缓存，该第二处理核心还包括在处理器的硅衬底中，具有来自系统存储区域的第二存储器分配，其中第二存储器分配对应于对应于不同分区的另一个高速缓存扩展大小 正在由第二处理核心执行。

公开(公告)号：US08359346B2

公开(公告)日：2013-01-22

申请号：US12612757

申请日：2009-11-05

Applicant: Brian C. Grayson ,  Leick D. Robinson ,  Benjamin M. Menchaca

Inventor： Brian C. Grayson ,  Leick D. Robinson ,  Benjamin M. Menchaca

IPC: G06F7/00

CPC classification number: H04L63/10 ,  H04L9/0643 ,  H04L2209/12 ,  H04L2209/80

Abstract: A logic block is presented that generates avalanche criterion hash values using minimal logic. The logic block includes a first exclusive-OR function, a second exclusive-OR function, and an OR function. The first exclusive-OR function receives two input bits from a data packet and generates a linear output value based upon exclusive disjunction between the two input bits. The OR function receives two different input bits from the data packet and generates a first nonlinear output value based upon logical disjunction between the two different input bits. The second exclusive-OR function receives the linear output value and the first nonlinear output value, and generates a second nonlinear output value based upon exclusive disjunction between the linear output value and the first nonlinear output value. In turn, the second nonlinear output value is utilized to generate a hash value for the data packet.

Abstract translation: 呈现出使用最小逻辑产生雪崩标准散列值的逻辑块。 逻辑块包括第一异或函数，第二异或函数和OR函数。 第一个异或功能从数据包接收两个输入位，并且基于两个输入位之间的独占分离产生线性输出值。 OR功能从数据包接收两个不同的输入位，并且基于两个不同输入位之间的逻辑分离产生第一非线性输出值。 第二异或功能接收线性输出值和第一非线性输出值，并且基于线性输出值和第一非线性输出值之间的排除分离产生第二非线性输出值。 反过来，第二非线性输出值用于产生数据包的散列值。

公开(公告)号：US08032871B2

公开(公告)日：2011-10-04

申请号：US12365413

申请日：2009-02-04

Applicant: Daniel Alan Brokenshire ,  Barry L Minor ,  Mark Richard Nutter

Inventor： Daniel Alan Brokenshire ,  Barry L Minor ,  Mark Richard Nutter

IPC: G06F9/45

CPC classification number: G06F9/322 ,  G06F8/451 ,  G06F9/3851 ,  G06F9/50

Abstract: Processor resources are partitioned based on memory usage. A compiler determines the extent to which a process is memory-bound and accordingly divides the process into a number of threads. When a first thread encounters a prolonged instruction, the compiler inserts a conditional branch to a second thread. When the second thread encounters a prolonged instruction, a conditional branch to a third thread is executed. This continues until the last thread conditionally branches back to the first thread. An indirect segmented register file is used so that the “return to” and “branch to” logical registers within each thread are the same (e.g., R1 and R2) for each thread. These logical registers are mapped to hardware registers that store actual addresses. The indirect mapping is altered to bypass completed threads. When the last thread completes it may signal an external process.

Abstract translation: 处理器资源根据内存使用情况进行分区。 编译器确定进程是内存限制的程度，从而将进程划分为多个线程。 当第一个线程遇到延长的指令时，编译器将条件分支插入第二个线程。 当第二个线程遇到延长的指令时，执行到第三个线程的条件分支。 这将持续到最后一个线程有条件地分支回到第一个线程。 使用间接分段寄存器文件，使得每个线程内的“返回”和“分支到”逻辑寄存器对于每个线程是相同的（例如，R1和R2）。 这些逻辑寄存器映射到存储实际地址的硬件寄存器。 间接映射被更改为绕过完成的线程。 当最后一个线程完成时，它可能会发出外部进程信号。

公开(公告)号：US08009672B2

公开(公告)日：2011-08-30

申请号：US11778036

申请日：2007-07-14

Applicant: Deanna Lynn Quigg Brown ,  Vinit Jain ,  Vasu Vallabhaneni ,  Venkat Venkatsubra

Inventor： Deanna Lynn Quigg Brown ,  Vinit Jain ,  Vasu Vallabhaneni ,  Venkat Venkatsubra

IPC: H04L12/28

CPC classification number: H04L45/00 ,  H04L29/06 ,  H04L45/24 ,  H04L47/10 ,  H04L47/34 ,  H04L69/14 ,  H04L69/16 ,  H04L69/161 ,  H04L69/166

Abstract: A method, system and apparatus for improving data transfer rate over a network are provided. When a piece of data is to be transmitted to a target system, it is divided into a number of packets and a determination is made as to whether the number of packets exceeds a threshold number. If so, the packets are transferred in parallel over a plurality of network connections. The ideal network connections are TCP/IP connections. Thus, each packet has an IP header, which contains an IP identification field. An indicium is placed into the IP identification field for proper reconstruction of the data by the target system.

Abstract translation: 提供了一种用于提高网络上的数据传输速率的方法，系统和装置。 当一条数据要发送到目标系统时，将其分成多个分组，并确定分组数是否超过阈值数。 如果是这样，则分组在多个网络连接上并行传送。 理想的网络连接是TCP / IP连接。 因此，每个分组具有包含IP标识字段的IP报头。 将标记放入IP识别字段，以便目标系统正确重建数据。

公开(公告)号：US07945789B2

公开(公告)日：2011-05-17

申请号：US11530933

申请日：2006-09-12

Applicant: Mark Richard Nutter ,  Kanna Shimizu

Inventor： Mark Richard Nutter ,  Kanna Shimizu

IPC: G06F12/14

CPC classification number: G06F9/461 ,  G06F21/52 ,  G06F21/74

Abstract: A system and method for securely restoring software program context is presented. A special purpose processor core is included in a heterogeneous processing environment where each processor can access a shared memory. The isolated special purpose processor core includes an isolated local memory. The isolated special purpose processor core receives an identifier corresponding to the secured program. The identifier is used to read an encrypted context of the secured program from the shared memory. The encrypted context is decrypted using an encryption key. The decrypted context is stored in the isolated special purpose processor core's local memory. The secured program's context integrity is verified by using a persistent security data that is retrieved from a secure location, such as a persistent storage register that can only be accessed when the special purpose processor core is running in isolation mode. If the context is verified, the secured program is executed.

Abstract translation: 提出了一种安全恢复软件程序环境的系统和方法。 专用处理器核心包含在异构处理环境中，每个处理器可以访问共享内存。 隔离的专用处理器内核包括一个隔离的本地存储器。 隔离的专用处理器核心接收对应于安全程序的标识符。 标识符用于从共享存储器读取加密程序的加密上下文。 使用加密密钥对加密的上下文进行解密。 解密的上下文存储在隔离的专用处理器核心的本地存储器中。 安全程序的上下文完整性通过使用从安全位置检索的持久性安全数据（例如只有专用处理器内核以隔离模式运行时才能访问的持久存储寄存器）来验证。 如果上下文被验证，则执行安全程序。

公开(公告)号：US07890998B2

公开(公告)日：2011-02-15

申请号：US11770852

申请日：2007-06-29

Applicant: Yantian Tom Lu ,  Thomas Walters Drew

Inventor： Yantian Tom Lu ,  Thomas Walters Drew

IPC: G11C7/00

CPC classification number: H04L63/08 ,  G06F21/6218 ,  H04L63/102

Abstract: A system, method, and program product is provided that provides authentication on a per-role basis in a Role-Based Access Control (RBAC) environment. When a user attempts to acquire a role, the improved RBAC system determines whether (a) no authentication is required (e.g., for a non-sensitive role such as accessing a company's product catalog), (b) a user-based authentication (e.g., password) is required, or (c) a role-based authentication (e.g., role-specific password is required).

Abstract translation: 提供了一种在基于角色的访问控制（RBAC）环境中在每个角色基础上提供身份验证的系统，方法和程序产品。 当用户尝试获取角色时，改进的RBAC系统确定（a）是否需要认证（例如，对于非敏感角色，例如访问公司的产品目录），（b）基于用户的认证（例如， ，密码），或（c）基于角色的身份验证（例如，需要角色特定的密码）。

公开(公告)号：US07856600B2

公开(公告)日：2010-12-21

申请号：US11774603

申请日：2007-07-08

Applicant: Samar Choudhary ,  John M. Lucassen ,  Shankar Ramaswamy ,  Sai Gopala Rathnam ,  Amber Roy-Chowdhury ,  Douglass J. Wilson

Inventor： Samar Choudhary ,  John M. Lucassen ,  Shankar Ramaswamy ,  Sai Gopala Rathnam ,  Amber Roy-Chowdhury ,  Douglass J. Wilson

IPC: G06F3/048 ,  G06F3/00 ,  G06F15/16

CPC classification number: G06F17/3089

Abstract: A system and method is provided for integrating portlets. When viewing portlets within a portal container, a user is presented with a choice of one or more sources of data and, for each source, one or more actions that the user can take regarding the source. When an action is selected, it causes the source data to be transferred to one or more “target” portlets that have also been activated by the user. The set of actions available from a given source is automatically provided given the available target portlets. As each portlet is initialized, it informs a “broker” of the actions that the portlet supports along with the type of data that is used by the action. When a portal page is being constructed, each portlet identifies to the broker the sources of data within the portlet along with the values and data types corresponding to the sources.

Abstract translation: 提供了一种集成portlet的系统和方法。 当在门户容器中查看Portlet时，向用户呈现一个或多个数据源的选择，并且对于每个源，用户可以采用关于源的一个或多个动作。 当选择动作时，它会使源数据传输到一个或多个用户也已激活的“目标”portlet。 给定可用的目标portlet会自动提供给定源可用的一组操作。 当每个portlet被初始化时，它会通知“代理”portlet支持的操作以及该操作使用的数据类型。 当构建门户页面时，每个portlet向代理标识portlet中的数据源以及与源对应的值和数据类型。

公开(公告)号：US07496917B2

公开(公告)日：2009-02-24

申请号：US10670835

申请日：2003-09-25

Applicant: Daniel Alan Brokenshire ,  Michael Norman Day ,  Barry L Minor ,  Mark Richard Nutter

Inventor： Daniel Alan Brokenshire ,  Michael Norman Day ,  Barry L Minor ,  Mark Richard Nutter

IPC: G06F9/46 ,  G06F15/16 ,  G06F15/167 ,  G06F13/00

CPC classification number: G06F9/4843 ,  G06F9/544

Abstract: A method is provided to allow virtual devices that use a plurality of processors in a multiprocessor systems, such as the BE environment. Using this method, a synergistic processing unit (SPU) can either be dedicated to performing a particular function (i.e., audio, video, etc.) or a single SPU can be programmed to perform several functions on behalf of the other processors in the system. The application, preferably running in one of the primary (PU) processors, issues IOCTL commands through device drivers that correspond to SPUs. The kernel managing the primary processors responds by sending an appropriate message to the SPU that is performing the dedicated function. Using this method, an SPU can be virtualized for swapping multiple tasks or dedicated to performing a particular task.

Abstract translation: 提供了一种方法来允许在诸如BE环境的多处理器系统中使用多个处理器的虚拟设备。 使用这种方法，协同处理单元（SPU）可以专用于执行特定功能（即，音频，视频等），或者单个SPU可被编程为代表系统中的其他处理器执行若干功能 。 优选地，在主（PU）处理器之一中运行的应用通过对应于SPU的设备驱动器发出IOCTL命令。 管理主处理器的内核通过向执行专用功能的SPU发送适当的消息来做出响应。 使用此方法，可以将SPU虚拟化用于交换多个任务或专用于执行特定任务。

公开(公告)号：US07480716B2

公开(公告)日：2009-01-20

申请号：US10425539

申请日：2003-04-28

Applicant: Nathanael F. Ehrich ,  Robert C. Leah ,  Niraj P. Joshi

Inventor： Nathanael F. Ehrich ,  Robert C. Leah ,  Niraj P. Joshi

IPC: G06F15/173

CPC classification number: G06F17/3089 ,  G06Q30/0256 ,  H04L67/02 ,  H04L67/22 ,  H04L69/329

Abstract: Non-invasive collection of data is presented. A server segments a web page into regions and sends the segmented web page along with a data collector program to a client in response to receiving a client request. The client displays the web page and loads the data collector program which initiates particular event handlers to monitor user event activity corresponding to the displayed web page. When the user performs a user event, such as moving his mouse into a particular web page region, the data collector program collects user event data and associates the user event data with the particular web page region. When the user event is complete, the data collector program sends the collected user event data to the server.

Abstract translation: 介绍了非侵入性数据收集。 服务器将网页分割成区域，并响应于接收到客户端请求而将分段的网页和数据收集器程序一起发送给客户端。 客户端显示网页并加载数据收集器程序，该程序启动特定的事件处理程序，以监视与显示的网页相对应的用户事件活动。 当用户执行诸如将鼠标移动到特定网页区域中的用户事件时，数据收集器程序收集用户事件数据并将用户事件数据与特定网页区域相关联。 当用户事件完成时，数据收集器程序将收集到的用户事件数据发送到服务器。

公开(公告)号：US07448036B2

公开(公告)日：2008-11-04

申请号：US10138890

申请日：2002-05-02

Applicant: Larry Bert Brenner ,  Mysore Sathyanarayana Srinivas ,  James W. Van Fleet

Inventor： Larry Bert Brenner ,  Mysore Sathyanarayana Srinivas ,  James W. Van Fleet

IPC: G06F9/46

CPC classification number: G06F9/4881

Abstract: A system and method for thread scheduling with a weak preemption policy is provided. The scheduler receives requests from newly ready work. The scheduler adds a “preempt value” to the current work's priority so that it is somewhat increased for preemption purposes. The preempt value can be adjusted in order to make it more, or less, difficult for newly ready work to preempt the current work. A “less strict” preemption policy allows current work to complete rather than interrupting the current work and resume it at a later time, thus saving system overhead. Newly ready work that is queued with a better priority than the current work is queued in a favorable position to be executed after the current work is completed but before other work that has been queued with the same priority of the current work.

Abstract translation: 提供了一种具有弱抢占策略的线程调度的系统和方法。 调度器从新准备工作接收请求。 调度程序为当前工作的优先级添加“抢占价值”，以便为了抢占目的而有所增加。 可以调整抢先价值，以便使新的现成工作能够抢占当前工作更多或更少。 “较不严格”的抢占政策允许当前工作完成而不是中断当前工作，并在以后恢复，从而节省系统开销。 与当前工作相比优先排队的新准备工作排队等候在当前工作完成之后执行的有利位置，但在排队等同于当前工作优先级的其他工作之前。