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公开(公告)号：US10574247B1
公开(公告)日：2020-02-25
申请号：US16131886
申请日：2018-09-14
Applicant: Analog Devices Global Unlimited Company
Inventor： Junbiao Ding , Tony Yincai Liu , Dennis A. Dempsey , John Jude O'Donnell
Abstract: The present disclosure relates to a digital-to-analog converter (DAC) which includes a resistor string and a transfer function modification circuit. The transfer function modification circuit may be a calibration circuit for calibrating the DAC, The calibration circuit may include a plurality of current sources, which may be current DACs. Each of the current DACS inject current into, or drain current from, a respective node of the resistor string, in order to correct for voltage errors. The injected currents may be positive or negative, depending on the voltage error. The current DACs are controlled by trim codes, which are set dependent on the measured or simulated voltage errors for a given resistor string.
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公开(公告)号：US10557881B2
公开(公告)日：2020-02-11
申请号：US15801132
申请日：2017-11-01
Applicant: Analog Devices Global
Inventor： Alan J. O'Donnell , David Aherne , Javier Alejandro Salcedo , David J. Clarke , John A. Cleary , Patrick Martin McGuinness , Albert C. O'Grady
Abstract: Aspects of this disclosure relate to detecting and recording information associated with electrical overstress (EOS) events, such as electrostatic discharge (ESD) events. For example, in one embodiment, an apparatus includes an electrical overstress protection device, a detection circuit configured to detect an occurrence of the EOS event, and a memory configured to store information indicative of the EOS event.
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公开(公告)号：US20200044614A1
公开(公告)日：2020-02-06
申请号：US16055437
申请日：2018-08-06
Applicant: Analog Devices Global Unlimited Company
Inventor： Mohamed Moussa Ramadan Esmael
Abstract: Systems, methods, and apparatuses for improving reliability and/or reducing or preventing breakdown of an amplifier, specifically breakdown of a transistor of an amplifier, are disclosed. A protection circuit can be electrically coupled to the amplifier, and can be configured to reduce a voltage swing at the amplifier. The amplifier can include a first transistor, and the protection circuit can include a second transistor electrically coupled to a control terminal of the first transistor of the amplifier. When a power at a control terminal of the second transistor of the protection circuit satisfies a threshold power, the protection circuit can be configured to reduce a power at a power terminal of the first transistor the amplifier. By reducing the voltage at the power terminal of the first transistor the amplifier, the protection circuit can allow the amplifier to operate safely, without breakdown.
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公开(公告)号：US20200042026A1
公开(公告)日：2020-02-06
申请号：US16050742
申请日：2018-07-31
Applicant: Analog Devices Global Unlimited Company
Inventor： Langyuan Wang , Danzhu Lu , Xiaohan Gong , Bin Shao
Abstract: An electronic circuit includes parallel linear regulator circuits that support a range of different load currents. The electronic circuit includes a first linear regulator circuit coupled to an output node, a second linear regulator circuit coupled in parallel with the first linear regulator circuit and the output node, and a control circuit. The control circuit is configured to monitor the output node and to suppress or inhibit the second linear regulator circuit from supplying the output node when a representation of load power consumption is below a specified threshold. The first linear regulator circuit is configured to continue to supply a portion of the load power when the representation of load power consumption is above the specified threshold, and the control circuit may disable the second linear regulator circuit when the representation of load power consumption is below the specified threshold.
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公开(公告)号：US20200036366A1
公开(公告)日：2020-01-30
申请号：US16048860
申请日：2018-07-30
Applicant: Analog Devices Global Unlimited Company
Inventor： Gaurav Gupta , Arthur J. Kalb
IPC: H03K3/011 , H03K17/60 , G05F1/567 , A61B5/0428 , A61B5/00
Abstract: Techniques to generate two separate temperature independent reference voltages. The reference voltages can be generated using a chain of ΔVBE cells. A cross-quad ΔVBE-cell-based bandgap voltage reference can cancel out noise of associated current sources by forcing them to correlate. Several ΔVBE stages can be cascaded together to generate an appreciable PTAT component that can cancel the CTAT component from VBE. In some example configurations, only BJTs are used—without requiring use of an amplifier—to generate the bandgap voltages; in this way, extremely low noise voltage references can be generated. The PTAT and the CTAT voltages can be combined to generate a bandgap voltage of approximately VG0 or approximately 2VG0.
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Patent Agency Ranking
26.发明申请公开(公告)号：US20200028477A1
公开(公告)日：2020-01-23
申请号：US16042782
申请日：2018-07-23
Applicant: Analog Devices Global Unlimited Company
Abstract: Aspects of this disclosure relate to an adaptive biasing circuit for a power amplifier. The adaptive biasing circuit can include a shunt resistor arrangement and/or a floating gate linearizer arrangement.
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公开(公告)号：US20190383645A1
公开(公告)日：2019-12-19
申请号：US16007794
申请日：2018-06-13
Applicant: Analog Devices Global Unlimited Company
Inventor： Peter James Tonge , Monsoon Dutt , Michael Mueller-Aulmann
Abstract: The disclosure relates to a method of determining the initialization state of a multi-turn sensor based on the sensor outputs. The method takes a reading of the sensor outputs, and then determines whether the sensor outputs are feasible based on an assumption that the sensor is initialised in one of two states. If the sensor outputs are correct, this initial assumption is taken to also be correct. However, if an incorrect sensor output is read, then it is taken that the assumed initialization state is incorrect. The sensor is therefore taken to be initialised in the alternative state. The method will then determine whether the sensor outputs are feasible based on this second assumption, and if an incorrect sensor output is still being read, then there is a fault in the multi-turn sensor.
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公开(公告)号：US10511316B2
公开(公告)日：2019-12-17
申请号：US16053455
申请日：2018-08-02
Applicant: Analog Devices Global Unlimited Company
Inventor： Rares Bodnar , Roberto S. Maurino , Christopher Peter Hurrell , Asif Ahmad
Abstract: A stage, suitable for use in and analog to digital converter or a digital to analog converter, comprises a plurality of slices. The slices can be operated together to form a composite output having reduced thermal noise, while each slice on its own has sufficiently small capacitance to respond quickly to changes in digital codes applied to the slice. This allows a fast conversion to be achieved without loss of noise performance. The slices can be sub-divided to reduce scaling mismatch between the most significant bit and the least significant bit. A shuffling scheme is implemented that allows shuffling to occur between the sub-sections of the slices without needing to implement a massively complex shuffler.
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公开(公告)号：US10509104B1
公开(公告)日：2019-12-17
申请号：US16102113
申请日：2018-08-13
Applicant: Analog Devices Global Unlimited Company
Inventor： Pablo Cruz Dato
Abstract: Apparatus and methods for synchronization of multiple semiconductor dies are provided herein. In certain implementations, a reference clock signal is distributed to two or more semiconductor dies that each include at least one data converter. The two or more dies include a master die that generates a data converter synchronization signal, and at least one slave die that processes the data converter synchronization signal to align timing of data conversion operations across the dies, for instance, to obtain a high degree of timing coherence for digital sampling. In certain implementations, the dies correspond to radar chips of a radar system, and the data converter synchronization signal corresponds to an analog-to-digital converter (ADC) synchronization signal. Additionally, the master radar chip generates a ramp synchronization signal to synchronize transmission sequencing across the radar chips and/or to provide phase alignment of ADC clock signals.
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公开(公告)号：US10480970B2
公开(公告)日：2019-11-19
申请号：US14975026
申请日：2015-12-18
Applicant: Analog Devices Global
Inventor： Ke Li
Abstract: An interface circuit to an electromagnetic flow sensor is described. In an example, it can provide a DC coupled signal path from the electromagnetic flow sensor to an analog-to-digital converter (ADC) circuit. Examples with differential and pseudo-differential signal paths are described. Examples providing DC offset or low frequency noise compensation or cancellation are described. High input impedance examples are described. Coil excitation circuits are described, such as can provide on-chip inductive isolation between signal inputs and signal outputs. A switched mode power supply can be used to actively manage a bias voltage of an H-Bridge, such as to boost the current provided by the H-Bridge to the sensor coil during select time periods, such as during phase shift time periods of the coil, which can help reduce or minimize transient noise during such time periods.
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