Abstract:
A method and apparatus for nested control flow includes a processor having at least one context bit. The processor includes a plurality of arithmetic logic units for performing single instruction multiple data (SIMD) operations. The method and apparatus further includes a first memory device storing a plurality of instructions wherein each of the plurality of instructions includes a plurality of extra bits. The processor is operative to execute the instructions based on the extra bits and in conjunction with a context bit. The method and apparatus further includes a second memory device, such as a general purpose register operably coupled to the processor, the second memory device receiving an incrementing counter instruction upon the execution of one of the plurality of instructions. As such, the method and apparatus allows for nested control flow through a single context bit in conjunction with instructions having a plurality of extra bits.
Abstract:
A method and apparatus for processing real time command information includes a real time event engine that monitors event signals. A real time event detector within the real time event engine detects when the real time event occurs. Thereupon, real time event commands within a real time event command buffer are fetched and consumed by the command processor in response to the occurrence of the real time event. The real time event detector contains a plurality of control registers, which contain an event selector register, a real time command buffer point register, and a real time command buffer length register. A driver may program the registers, whereupon a singe real time event detector may be used in conjunction with a plurality of real time event command buffers.
Abstract:
In general, techniques are described for visibility-based state updates in graphical processing units (GPUs). A device that renders image data comprising a memory configured to store state data and a GPU may implement the techniques. The GPU may be configured to perform a multi-pass rendering process to render an image from the image data. The GPU determines visibility information for a plurality of objects defined by the image data during a first pass of the multi-pass rendering process. The visibility information indicates whether each of the plurality of objects will be visible in the image rendered from the image data during a second pass of the multi-pass rendering process. The GPU then retrieves the state data from the memory for use by the second pass of the multi-pass rendering process in rendering the plurality of objects of the image data based on the visibility information.
Abstract:
This disclosure is directed to deferred preemption techniques for scheduling graphics processing unit (GPU) command streams for execution on a GPU. A host CPU is described that is configured to control a GPU to perform deferred-preemption scheduling. For example, a host CPU may select one or more locations in a GPU command stream as being one or more locations at which preemption is allowed to occur in response to receiving a preemption notification, and may place one or more tokens in the GPU command stream based on the selected one or more locations. The tokens may indicate to the GPU that preemption is allowed to occur at the selected one or more locations. This disclosure further describes a GPU configured to preempt execution of a GPU command stream based on one or more tokens placed in a GPU command stream.
Abstract:
In general, in an aspect, the invention provides a multimedia entertainment system including a communication link, a video source coupled to the communication link and configured to produce a video signal and provide the video signal to the communication link, a video display coupled to the communication link and configured to receive the video signal from the video source via the communication link, and to provide dynamic display characteristic information indicative of a display capability of the video display to the video source via the communication link, wherein the video source is configured to receive the dynamic display characteristic information and to produce the video signal as a function of the dynamic display characteristic information, and wherein the video display is configured to display a video image in accordance with the video signal provided by the video source.
Abstract:
In general, techniques are described for visibility-based state updates in graphical processing units (GPUs). A device that renders image data comprising a memory configured to store state data and a GPU may implement the techniques. The GPU may be configured to perform a multi-pass rendering process to render an image from the image data. The GPU determines visibility information for a plurality of objects defined by the image data during a first pass of the multi-pass rendering process. The visibility information indicates whether each of the plurality of objects will be visible in the image rendered from the image data during a second pass of the multi-pass rendering process. The GPU then retrieves the state data from the memory for use by the second pass of the multi-pass rendering process in rendering the plurality of objects of the image data based on the visibility information.
Abstract:
In general, in an aspect, the invention provides a multimedia entertainment system including a communication link, a video source coupled to the communication link and configured to produce a video signal and provide the video signal to the communication link, a video display coupled to the communication link and configured to receive the video signal from the video source via the communication link, and to provide dynamic display characteristic information indicative of a display capability of the video display to the video source via the communication link, wherein the video source is configured to receive the dynamic display characteristic information and to produce the video signal as a function of the dynamic display characteristic information, and wherein the video display is configured to display a video image in accordance with the video signal provided by the video source.
Abstract:
A graphics processing system comprises at least one memory device storing a plurality of pixel command threads and a plurality of vertex command threads. An arbiter coupled to the at least one memory device is provided that selects a pixel command thread from the plurality of pixel command threads and a vertex command thread from the plurality of vertex command threads. The arbiter further selects a command thread from the previously selected pixel command thread and the vertex command thread, which command thread is provided to a command processing engine capable of processing pixel command threads and vertex command threads.
Abstract:
The present invention includes a multi-thread graphics processing system and method thereof including a reservation station having a plurality of command threads stored therein. The system and method further includes an arbiter operably coupled to the reservation station such that the arbiter retrieves a first command thread of the plurality of command threads stored therein such that the arbiter receives the command thread and thereupon provides the command thread to a command processing engine. The system and method further includes the command processing engine coupled to receive the first command thread from the arbiter such that the command processor may perform at least one processing command from the command thread. Whereupon, a command processing engine provides the first command thread back to the associated reservation station.
Abstract:
A method and system for higher level filtering uses a native bilinear filter, typically found in a texture mapper, and combines a plurality of bilinear filter results from the bilinear filter to produce a higher level filtered texel value. A native bilinear filter is operative to generate bilinear filtered texel values by performing a plurality of bilinearly filtered texture fetches using bilinear filter fetch coordinates. The method and system combines the plurality of bilinear filtered texel values with a plurality of weights to generate the higher level filtered texel value.