Apparatus and method for mapping architectural registers to physical registers
    21.
    发明申请
    Apparatus and method for mapping architectural registers to physical registers 有权
    将架构寄存器映射到物理寄存器的装置和方法

    公开(公告)号:US20110307681A1

    公开(公告)日:2011-12-15

    申请号:US12801576

    申请日:2010-06-15

    IPC分类号: G06F12/10

    摘要: An apparatus and method are provided for performing register renaming, whereby architectural registers from a set of architectural registers are mapped to physical registers from a set of physical registers. Available register identifying circuitry is provided which is responsive to a current state of the apparatus to identify which physical registers form a pool of physical registers available to be mapped by register renaming circuitry to an architectural register specified by an instruction to be executed. Configuration storage stores configuration data whose value is modified during operation of the processing circuitry, such that when the configuration data has a first value, the configuration data identifies at least one architectural register of the architectural register set which does not require mapping to a physical register by the register renaming circuitry. The available register identifying circuitry is arranged to reference the configuration storage, such that when the configuration data has the first value, the number of physical registers in the pool is increased due to the reduction in the number of architectural registers which require mapping to physical registers. This enables the performance benefits from performing register renaming to be improved, without the need to increase the number of physical registers within the physical register set.

    摘要翻译: 提供了一种用于执行寄存器重命名的装置和方法,其中来自一组架构寄存器的架构寄存器从一组物理寄存器映射到物理寄存器。 提供了可用的寄存器识别电路,其响应于设备的当前状态,以识别哪些物理寄存器形成可被寄存器重命名电路映射到可由要执行的指令指定的架构寄存器的物理寄存器池。 配置存储器存储其值在处理电路的操作期间被修改的配置数据,使得当配置数据具有第一值时,配置数据标识架构寄存器集的至少一个体系结构寄存器,其不需要映射到物理寄存器 通过寄存器重命名电路。 可用的寄存器识别电路被布置为引用配置存储器,使得当配置数据具有第一值时,由于需要映射到物理寄存器的架构寄存器的数量的减少,池中的物理寄存器的数量增加 。 这使得能够改进执行寄存器重命名的性能优势,而不需要增加物理寄存器集中的物理寄存器的数量。

    Debug circuitry
    22.
    发明授权
    Debug circuitry 有权
    调试电路

    公开(公告)号:US07823019B2

    公开(公告)日:2010-10-26

    申请号:US12149851

    申请日:2008-05-08

    IPC分类号: G06F11/00

    CPC分类号: G06F11/3648

    摘要: An apparatus for processing data includes diagnostic mechanisms for providing watch point and breakpoint functionality. Semaphores are associated with the watch points and are provided with hardware support within the diagnostic circuitry serving to monitor whether or not accesses to watch point data is being made in accordance with the permissions set up and noted in the semaphore data.

    摘要翻译: 用于处理数据的装置包括用于提供观察点和断点功能的诊断机构。 信标与观察点相关联,并在诊断电路内提供硬件支持,用于监视是否根据在信号量数据中设置和记录的权限进行对观察点数据的访问。

    Speculative data value usage
    24.
    发明授权
    Speculative data value usage 有权
    投机数据使用量

    公开(公告)号:US07590826B2

    公开(公告)日:2009-09-15

    申请号:US11593151

    申请日:2006-11-06

    IPC分类号: G06F15/76

    摘要: A data processing system 2 utilizes a register renaming mechanism 10, 26 to rename architectural register specifiers to physical register specifiers to facilitate out-of-order processing. The register renaming mechanism 10, 26 includes a renaming recovery unit 26 which enables recovery from incorrectly executed speculative instructions by restoring the register mapping to the state prior to those incorrect instructions with the physical registers restored to containing the data values which were current at the time prior to that incorrect instruction. In the case of load instructions, these are treated as speculative but the data value returned in response to the load instruction and stored within a physical register is released for use as soon as it is returned and prior to a determination result being available as to whether or not that data value is corrupt. Corruption checking an take the form of ECC checking, parity checking and the like, and when a late error signal is generated then this indicates whether or not the data value has been properly released for use. If corruption is detected, then the renaming recovery unit 26 is used to recover the state of the system 2 in a precise way to that preceding the failing load instruction.

    摘要翻译: 数据处理系统2利用寄存器重命名机构10,26将架构寄存器说明符重命名为物理寄存器说明符,以便于无序处理。 寄存器重命名机构10,26包括重命名恢复单元26,其使得能够通过将寄存器映射恢复到在那些不正确的指令之前的状态,使得恢复到不正确执行的推测性指令,使物理寄存器恢复为包含当时当前的数据值 在该错误指令之前。 在加载指令的情况下,这些被视为推测性的,但是响应于加载指令返回并存储在物理寄存器中的数据值在返回时被解除使用,并且在确定结果可用于是否 或者不是该数据值已损坏。 腐败检查采取ECC检查,奇偶校验等形式,并且当产生延迟错误信号时,这指示数据值是否已被正确释放以供使用。 如果检测到损坏,则重命名恢复单元26用于以精确的方式将系统2的状态恢复到故障加载指令之前的状态。

    Marking registers as available for register renaming
    25.
    发明申请
    Marking registers as available for register renaming 审中-公开
    标记寄存器可用于注册重命名

    公开(公告)号:US20080148022A1

    公开(公告)日:2008-06-19

    申请号:US11637947

    申请日:2006-12-13

    IPC分类号: G06F15/00

    摘要: The present application discloses register renaming circuitry for mapping registers from an architectural set of registers to registers within a physical set of registers, said architectural set of registers being registers specified by instructions within an instruction set and said physical set of registers being registers within a processor for processing instructions of said instruction set, said instruction set comprising exception instructions and non-exception instructions, exception instructions being instructions that may generate an exception and non-exception instructions being instructions that execute in a statically determinable way, said register renaming circuitry comprising: a first data store for storing a future renaming table, said future renaming table comprising renaming values for mapping registers from said architectural set of registers to registers in said physical set of registers for instructions that are to be executed or are currently being executed by said processor; a second data store for storing a recovery renaming table, said recovery renaming table comprising a most recently committed mapping of said processor; wherein said register renaming circuitry is responsive to detection of a predetermined condition to mark said physical registers not mapped in said recovery renaming table as available for renaming.

    摘要翻译: 本申请公开了一种用于将寄存器从体系结构寄存器映射到物理寄存器组内的寄存器的寄存器重命名电路,所述寄存器结构集是由指令集内的指令指定的寄存器,所述物理寄存器组是处理器内的寄存器 用于处理所述指令集的指令,所述指令集包括异常指令和非异常指令,异常指令是可以产生异常的指令,非异常指令是以静态可确定的方式执行的指令,所述寄存器重命名电路包括: 用于存储未来重命名表的第一数据存储器,所述未来重命名表包括将用于将寄存器映射到所述体系结构寄存器的值的值重命名为所述物理寄存器组中的寄存器,用于将由sai执行或正在执行的指令 d处理器 用于存储恢复重命名表的第二数据存储器,所述恢复重命名表包括所述处理器的最近提交的映射; 其中所述寄存器重命名电路响应于预定条件的检测,以将未映射在所述恢复重命名表中的所述物理寄存器标记为可用于重命名。

    Speculative data value usage
    27.
    发明申请
    Speculative data value usage 有权
    投机数据使用量

    公开(公告)号:US20080109614A1

    公开(公告)日:2008-05-08

    申请号:US11593151

    申请日:2006-11-06

    IPC分类号: G06F9/30 G06F15/76 G06F12/00

    摘要: A data processing system 2 utilises a register renaming mechanism 10, 26 to rename architectural register specifiers to physical register specifiers to facilitate out-of-order processing. The register renaming mechanism 10, 26 includes a renaming recovery unit 26 which enables recovery from incorrectly executed speculative instructions by restoring the register mapping to the state prior to those incorrect instructions with the physical registers restored to containing the data values which were current at the time prior to that incorrect instruction. In the case of load instructions, these are treated as speculative but the data value returned in response to the load instruction and stored within a physical register is released for use as soon as it is returned and prior to a determination result being available as to whether or not that data value is corrupt. Corruption checking an take the form of ECC checking, parity checking and the like, and when a late error signal is generated then this indicates whether or not the data value has been properly released for use. If corruption is detected, then the renaming recovery unit 26 is used to recover the state of the system 2 in a precise way to that preceding the failing load instruction.

    摘要翻译: 数据处理系统2利用寄存器重命名机构10,26将架构寄存器说明符重命名为物理寄存器说明符,以便于无序处理。 寄存器重命名机构10,26包括重命名恢复单元26,其使得能够通过将寄存器映射恢复到在那些不正确的指令之前的状态,使得恢复到不正确执行的推测性指令,使物理寄存器恢复为包含当时当前的数据值 在该错误指令之前。 在加载指令的情况下,这些被视为推测性的,但是响应于加载指令返回并存储在物理寄存器中的数据值在返回时被解除使用,并且在确定结果可用于是否 或者不是该数据值已损坏。 腐败检查采取ECC检查,奇偶校验等形式,并且当产生延迟错误信号时,这指示数据值是否已被正确释放以供使用。 如果检测到损坏,则重命名恢复单元26用于以精确的方式将系统2的状态恢复到故障加载指令之前的状态。