Abstract:
In one embodiment, an electrical connector includes a plurality of leadframe assembly assemblies, each having a leadframe housing and a plurality of electrical contacts carried by the leadframe housing. At least a pair of adjacent leadframe assemblies includes respective first and second conductive member portions of a conductive bar that reduces cross talk. The first and second portions are each seated in their respective leadframe housings and face each other such that the electrical connector is devoid of electrical contacts between the first and second portions.
Abstract:
An electric communication unit to be placed on a person's skin. The electric communication unit includes a support element, a series of body contacts, and a pulse generator. The pulse generator generates a series of pulses and transmits the series of pulses to the series of body contacts, the series of body contacts being provided to transmit the series of pulses onto the skin of the person. The electric communication unit is in the form of a patch.
Abstract:
A connector for connection between a circuit board and a further electronic component is disclosed. The connector includes an insulating housing having a board slot open towards a mating direction for accommodating the circuit board, and a plurality of terminals. The terminals have a rear portion, an intermediate portion and a tip portion, the intermediate portion including a contact portion for contacting a surface portion of the circuit board when accommodated in the board slot. The housing includes a window such that for a number of adjacent terminals housing material is absent between the intermediate portions. A shield member may be arranged in between the rear portions of the terminals. Improved circuit boards are also disclosed.
Abstract:
An electrical connector includes a plurality of leadframe assembly, each having a leadframe housing and a plurality of contacts carried by the leadframe housing. At least a pair of adjacent leadframe assemblies includes respective first and second conductive member portions that are seated in the leadframe housing at a desired location with respect to the corresponding electrical contacts.
Abstract:
A connector assembly includes a substrate and a connector. The substrate includes a ground layer and a trace layer. The substrate defines a substrate edge, and the ground layer defines a ground edge. The connector is mounted on the substrate such that a portion of the connector overhangs the substrate edge of the substrate. The connector includes a first signal contact that defines a mating portion, a mounting portion, a first transition portion connected to the mating portion, and a second transition portion connected to the first transition portion and the mounting portion. The first transition portion of the signal contact at least partially crosses the ground edge such that a gap is defined between the ground edge and the first transition portion and a substantial portion of the second transition portion extends over the gap when the electrical connector is mounted on the substrate.
Abstract:
An electrical connector including a lead frame assembly of a first dielectric material that includes a pocket filled with a second dielectric material. A first ground reference, which may be either a ground contact or conductor or a virtual ground defined between signal contacts of a differential signal pair, extends in the first dielectric material and has a first physical length. A second ground reference having a different physical length than the first length extends in the first dielectric material and also through the pocket. The combination of the length of the second ground reference through the pocket along with the difference in the dielectric constants associated with the first and second dielectric materials, provides for equalizing or matching the electrical lengths of these two references having different physical lengths. This may aid in reducing slot-line mode of a co-planar waveguide. The cross-sectional size of the second reference within the pocket may be altered to provide uniform impedance along the length of the second reference as well as an impedance matched to the first conductor.
Abstract:
Disclosed are methodologies for defining matched-impedance surface-mount technology footprints on a substrate such as a printed circuit board, for example, that is adapted to receive an electrical component having an arrangement of terminal leads. Such a footprint may include an arrangement of electrically-conductive pads and an arrangement of electrically-conductive vias. The via arrangement may differ from the pad arrangement. The vias may be arranged to increase routing density, while limiting cross-talk and providing for matched impedance between the component and the substrate. The via arrangement may be altered to achieve a desired routing density on a layer of the board. Increasing the routing density may decrease the number of board layers, which tends to decrease capacitance and thereby increase impedance. Ground vias and signal vias may be arranged with respect to one another in such a manner as to affect impedance. Thus, the via arrangement may be altered to achieve an impedance that matches the impedance of the component. The via arrangement may be also be altered to limit cross-talk among neighboring signal conductors. Thus, the via arrangement may be defined to balance the impedance, cross-talk, and routing density requirements of the system.
Abstract:
A method for modeling a general passive interconnection structure for use in a circuit simulator. The model is based on full-wave EM simulations and has a predefined accuracy when compared to the full-wave EM simulator. The interconnection structure is described by parameters that depend on geometric parameters determined by a vector x and the frequency of the signal passing through the interconnect circuit. In a CAD system according to the present invention, information representing a plurality of coefficients, Cm(f) is stored in the CAD system for m=0 to M. The CAD system also stores information specifying the values of a plurality of multinomial functions, Pm(x) for m=0 to M, wherein M>1. When the CAD system needs the value of one of the parameters that describes the interconnect circuit, the CAD system computes an approximation, M(f,x), to that parameter according to the relationship: M ( f , x ) = ∑ m = 0 M C m ( f ) P m ( x ) . wherein each Pm(x) is a multinomial for m>0. The algorithm combines three adaptive loops. The first adaptive loop selects the required data points by evaluating a number of selection criteria. The number of data points needed to achieve the desired accuracy for the model is minimized. The selected scattering parameters at the data points are calculated using, the full-wave EM simulator. The second adaptive loop selects the frequency points needed by the simulator to accurately model the behavior of the scattering parameters over the whole frequency range. The third adaptive loop selects the number of polynomials needed to accurately model the data points. The resulting model has a predefined accuracy when compared to full-wave EM simulations.