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公开(公告)号：US06888483B2
公开(公告)日：2005-05-03
申请号：US10893999
申请日：2004-07-20
Applicant: Jan Mulder
Inventor： Jan Mulder
CPC classification number: H03M1/0863 , H03K17/04106 , H03M1/146 , H03M1/204 , H03M1/36 , H03M1/365
Abstract: An input stage includes a plurality of arrays of autozero amplifiers arranged in series in each array, wherein each autozero amplifier receives an output of a preceding autozero amplifier, wherein a first autozero amplifier in each array amplifiers receives an input signal and a corresponding reference voltage at its inputs, and wherein at least one of the autozero amplifiers includes a circuit that receives the signal corresponding to the output signal, the circuit substantially passing the signal corresponding to the output signal and the reference voltages to the amplifiers during the clock phase φ2 and substantially rejecting the signal corresponding to the output signal during the clock phase φ1.
Abstract translation: 输入级包括在每个阵列中串联布置的多个自动调零放大器阵列，其中每个自动调零放大器接收前一自动调零放大器的输出，其中每个阵列放大器中的第一自动调零放大器接收输入信号和对应的参考电压 其输入，并且其中至少一个自动调零放大器包括接收对应于输出信号的信号的电路，所述电路在时钟相位phi
2 <！ - SIPO - >并且在时钟相位phi1 <1>中基本上拒绝对应于输出信号的信号。 -
22.发明授权Method for increasing rate at which a comparator in a metastable condition transitions to a steady state 失效用于提高亚稳态中的比较器转变到稳定状态的速率的方法公开(公告)号：US06876318B2
公开(公告)日：2005-04-05
申请号：US10798552
申请日：2004-03-12
Applicant: Jan Mulder , Franciscus M. L. van der Goes
Inventor： Jan Mulder , Franciscus M. L. van der Goes
CPC classification number: H03M1/0863 , H03M1/36
Abstract: A method for reducing bit errors in an analog to digital converter having an array of comparators. The outputs of first and second comparators are received as in inputs to an Exclusive OR gate. The first and second comparators are separated in the array by a third comparator. The output of the Exclusive OR gate is used to determine if the third comparator is in a metastable condition. If the third comparator is in a metastable condition, the bias current of the latch circuit of the third comparator is increased to increase the rate at which the third comparator transitions to a steady state.
Abstract translation: 一种用于减少具有比较器阵列的模数转换器中的位错误的方法。 第一和第二比较器的输出在异或门的输入中被接收。 第一和第二比较器由阵列中的第三比较器分开。 异或门的输出用于确定第三比较器是否处于亚稳态。 如果第三比较器处于亚稳态，则第三比较器的锁存电路的偏置电流增加，以增加第三比较器转变到稳定状态的速率。
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23.发明授权公开(公告)号：US06873210B2
公开(公告)日：2005-03-29
申请号：US10791878
申请日：2004-03-04
Applicant: Jan Mulder , Marcel Lugthart , Chi-Hung Lin
Inventor： Jan Mulder , Marcel Lugthart , Chi-Hung Lin
CPC classification number: H03H11/32
Abstract: Provided is a circuit to perform single-ended to differential conversion while providing common-mode voltage control. The circuit includes a converter to convert a single-ended signal to a differential signal and a stabilizing circuit adapted to receive the differential signal. The stabilizing circuit includes a sensor configured to sense a common-mode voltage level of the differential signal and a comparator having an output port coupled to the converter. The comparator is configured to compare the differential signal common-mode voltage level with a reference signal common-mode voltage level and produce an adjusting signal based upon the comparison. The adjusting signal is applied to the converter via the output port and is operative to adjust a subsequent common-mode voltage level of the differential signal.
Abstract translation: 提供了在提供共模电压控制的同时执行单端到差分转换的电路。 电路包括将单端信号转换为差分信号的转换器和适于接收差分信号的稳定电路。 稳定电路包括被配置为感测差分信号的共模电压电平的传感器和具有耦合到转换器的输出端口的比较器。 比较器被配置为将差分信号共模电压电平与参考信号共模电压电平进行比较，并且基于该比较产生调整信号。 调整信号经由输出端口被施加到转换器，并且可操作地调整差分信号的后续共模电压电平。
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公开(公告)号：US06639430B2
公开(公告)日：2003-10-28
申请号：US10083463
申请日：2002-02-27
Applicant: Klaas Bult , Rudy Van de Plassche , Jan Mulder
Inventor： Klaas Bult , Rudy Van de Plassche , Jan Mulder
IPC: G11C706
CPC classification number: H03K3/356043 , H03K3/012 , H03K3/35613 , H03K3/356182 , H03K3/356191 , H03M1/002 , H03M1/362
Abstract: In a latch circuit having a bistable pair of cross connected transistors of a first polarity and a third transistor of a second polarity, a current signal greater than a bias current is received at a latch circuit port, amplified with the third transistor, and applied to the latch circuit port. This decreases the time in which the latch circuit port receiving the current signal greater than the bias current reaches a steady state voltage.
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公开(公告)号：US06573853B1
公开(公告)日：2003-06-03
申请号：US10158595
申请日：2002-05-31
Applicant: Jan Mulder
Inventor： Jan Mulder
IPC: H03M114
CPC classification number: H03M1/0863 , H03K17/04106 , H03M1/146 , H03M1/204 , H03M1/36 , H03M1/365
Abstract: An analog to digital converter includes a reference ladder, a track-and-hold amplifier tracking an input signal with its output signal during the phase &psgr;1 and holding a sampled value during, a coarse analog to digital converter having a plurality of coarse amplifiers each inputting a corresponding tap from the reference ladder and the output signal, a fine analog-to-digital converter having a plurality of fine amplifiers inputting corresponding taps from the reference ladder and the output signal, the taps selected based on outputs of the coarse amplifiers, a clock having phases &psgr;1 and &psgr;2, a circuit responsive to the clock that receives the output signal, the circuit substantially passing the output signal and the corresponding taps to the fine amplifiers during the phase &psgr;2 and substantially rejecting the output signal and the corresponding taps during the phase &psgr;1, and an encoder converting outputs of the coarse and fine amplifiers to an N-bit digital signal representing the input signal.
Abstract translation: 模数转换器包括参考梯形图，跟踪和保持放大器，在相位psi1期间跟踪具有其输出信号的输入信号，并且在具有多个粗放大器的粗模数转换器期间保持采样值，每个粗放大器每个输入 来自参考梯形图和输出信号的对应抽头，具有多个精细放大器的精细模数转换器，该精细放大器从参考梯形图输入相应的抽头和输出信号，基于粗放大器的输出选择的抽头， 时钟具有相位psi1和psi2，响应于接收输出信号的时钟的电路，电路在阶段psi2期间基本上将输出信号和相应的抽头传递到精细放大器，并且在该期间基本上拒绝输出信号和对应的抽头 相位psi1，以及将粗略和精细放大器的输出转换成表示th的N位数字信号的编码器 e输入信号。
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Patent Agency Ranking
公开(公告)号：US5284435A
公开(公告)日：1994-02-08
申请号：US959817
申请日：1992-11-23
Applicant: Pieter W. J. M. Nuij , Peter P. W. L. van den Bekerom , Evert-Jan Mulder
CPC classification number: G11B7/263 , B29C59/02 , B29D17/005 , Y10S425/81
Abstract: An apparatus for manufacturing an object having a relief structure on a surface thereof by pressing a first element provided with a negative of the relief structure against a second element to form the relief structure in the surface of the second element. The apparatus includes the first element and two pressure members having pressure surfaces facing each other and opposing both of the elements, the pressure members being moveable relative to each other in a direction transverse to the pressure surfaces. The apparatus also has a pressure body secured to the pressure surface of at least one of the pressure member, having a contact surface for cooperation with one of the elements and being formed of a material whose quotient of its Poissons' ratio to its modules of elasticity differs less from the corresponding quotient of the material of the element cooperating with said contact surface in operation than from the corresponding quotient of the material of the pressure member to which the pressure body is secured.
Abstract translation: 一种用于通过将设置有所述浮雕结构物的负片的第一元件压在第二元件上来在其表面上制造具有浮雕结构的物体的装置，以在所述第二元件的表面中形成所述浮雕结构。 该装置包括第一元件和两个压力构件，其压力表面彼此相对并且相对于两个元件，压力构件可以在横向于压力表面的方向上相对于彼此移动。 该装置还具有固定在至少一个压力构件的压力表面上的压力体，该压力体具有用于与元件之一配合的接触表面，并且由其泊松比与其弹性模量的商品形成的材料形成 与在操作中与所述接触表面协作的元件的材料的相应商比与压力体被固定到的压力构件的材料的相应商相比更小。
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公开(公告)号：US4058382A
公开(公告)日：1977-11-15
申请号：US744521
申请日：1976-11-24
Applicant: Jan Mulder
Inventor： Jan Mulder
CPC classification number: F02G1/0435 , F25B9/14 , F01B11/00 , F05C2225/08 , F25B2309/001
Abstract: A hot-gas reciprocating machine having a free piston, one face of which varies the volume of a working space while its other face bounds a buffer space of constant pressure. A control mechanism maintains a constant nominal central piston position by momentarily connecting the working space and the buffer space.
Abstract translation: 一种具有自由活塞的热气往复机，其一面改变工作空间的体积，而其另一面限定了一定压力的缓冲空间。 控制机构通过暂时连接工作空间和缓冲空间来维持恒定的标称中心活塞位置。
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公开(公告)号：US4018552A
公开(公告)日：1977-04-19
申请号：US629146
申请日：1975-11-05
Applicant: Gijsbert Prast , Andries Mijnheer , Jan Mulder
Inventor： Gijsbert Prast , Andries Mijnheer , Jan Mulder
IPC: B29C43/00 , B29B13/00 , B29C33/00 , B29C33/02 , B29C33/04 , B29C33/38 , B29C43/02 , B29C43/32 , B29C43/36 , B29C43/52 , B29C61/00 , B29D17/00 , B29C3/00
CPC classification number: B29C43/52 , B29C33/04 , B29C43/02 , B29C33/048 , B29L2017/003 , Y10S425/81
Abstract: A pressing block for a phonograph or video record press in which ducts for cooling and heating media for the die are formed by a thin layer of a porous heat-conducting material provided between two thin metal sheets and bonded thereto. The assembly is connected on its side remote from the die to a supporting element of at least partially heat-insulating material.
Abstract translation: 用于留声机或视频记录压机的压块，其中用于模具的冷却和加热介质的管道由设置在两个薄金属片材之间并与其结合的多孔导热材料的薄层形成。 组件在其远离模具的一侧连接到至少部分绝热材料的支撑元件。
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公开(公告)号：US3991585A
公开(公告)日：1976-11-16
申请号：US529824
申请日：1974-12-05
Applicant: Jan Mulder
Inventor： Jan Mulder
CPC classification number: H02K33/18 , F02G1/0435 , F25B9/14 , F05C2225/08 , F25B2309/001
Abstract: A cold-gas refrigerator of the type in which the displacer is driven by pressure fluctuations generated in the working medium, the piston being coupled to an a.c. supplied linear actuator; the system formed by piston/armature coil assembly of the actuator and working medium resonates at a frequency which is tuned to the alternating current frequency.
Abstract translation: 一种冷气冷冻机，其中置换器由工作介质中产生的压力波动驱动，活塞与一个直流联接。 提供线性致动器; 由致动器和工作介质的活塞/电枢线圈组件形成的系统以调谐到交流频率的频率谐振。
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公开(公告)号：US08598906B2
公开(公告)日：2013-12-03
申请号：US11798334
申请日：2007-05-11
Applicant: Frank van der Goes , Christopher M. Ward , Jan Mulder , Ovidiu Bajdechi
Inventor： Frank van der Goes , Christopher M. Ward , Jan Mulder , Ovidiu Bajdechi
IPC: H03K19/17
CPC classification number: H03K3/012 , H03K19/0005 , H04L25/0278
Abstract: An electrical circuit comprising a line driver for providing Ethernet signals is disclosed. The line driver comprises a voltage mode line driver for producing 1000BT and 100BT Ethernet signals and an active output impedance line driver arranged parallel to the voltage mode line driver. The line driver is capable of producing 1000BT or 100BT or 10BT Ethernet signals, wherein either the voltage mode line driver or the active impedance line driver is active.
Abstract translation: 公开了一种包括用于提供以太网信号的线路驱动器的电路。 线路驱动器包括用于产生1000BT和100BT以太网信号的电压模式线路驱动器和与电压模式线路驱动器并联布置的有源输出阻抗线路驱动器。 线路驱动器能够产生1000BT或100BT或10BT以太网信号，其中电压模式线路驱动器或有源阻抗线路驱动器是活动的。
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