DISPLAY APPARATUS AND SOURCE DRIVER
    21.
    发明公开

    公开(公告)号:US20240105141A1

    公开(公告)日:2024-03-28

    申请号:US18471603

    申请日:2023-09-21

    Inventor: Shunsuke OZAWA

    Abstract: A display apparatus includes a plurality of source drivers outputting a gradation voltage signal and a selector switchably supplying the output gradation voltage signal to a plurality of data lines. The plurality of source drivers include a first source driver that has a first output buffer outputting a switching signal and a second source driver that has a second output buffer. The first output buffer has first and second transistors coupled via output terminals of the switching signal and turned ON and OFF complementarily. The second output buffer has third and fourth transistors coupled via output terminals of the switching signal and turned ON and OFF complementarily. The first and the second output buffers have the output terminals electrically coupled, and the first source driver has an abnormal detection circuit detecting a state causing a flow-through current to occur between the output terminals.

    DIFFERENTIAL AMPLIFIER
    22.
    发明公开

    公开(公告)号:US20240072745A1

    公开(公告)日:2024-02-29

    申请号:US18451820

    申请日:2023-08-17

    CPC classification number: H03F3/45269 H03F2203/45116

    Abstract: A differential amplifier includes a first input terminal, second input terminals, output terminals, differential amplification circuits, and a current source circuit. The first input terminal is one of an inverting input terminal and a non-inverting input terminal. Each of the second input terminals is another of the inverting input terminal and the non-inverting input terminal. The output terminals output voltages respectively corresponding to the second input terminals. The differential amplification circuits are connected to the first input terminal and the second input terminals and are provided corresponding to the second input terminals. The current source circuit is connected to the differential amplification circuits. Each of the differential amplification circuits outputs an output voltage corresponding to a combination of a voltage inputted to the first input terminal and a voltage inputted to one of the second input terminals from a corresponding one of the output terminals.

    DISPLAY DRIVER AND DISPLAY DEVICE
    23.
    发明公开

    公开(公告)号:US20240071318A1

    公开(公告)日:2024-02-29

    申请号:US18451853

    申请日:2023-08-18

    Abstract: A display driver and a display device are provided. The driver includes a first ladder resistor receiving a first potential at one end and a higher second potential at the other end to generate voltages obtained by dividing a voltage between first and second potentials; a second ladder resistor receiving first potential at one end, a second potential at the other end, and each of partial voltages among the voltages generated by the first ladder resistor at a connection point between the resistors to generate gradation reference voltages; first to k-th input amplifiers individually amplifying first to k-th DC bottom potentials respectively corresponding to first to k-th gamma correction characteristics to generate first to k-th amplified bottom potentials; and a first selector sequentially selecting one of the first to k-th amplified bottom potentials and supplying the selected one to one end of the first ladder resistor as a first potential.

    IC TAG AND SEMICONDUCTOR DEVICE
    24.
    发明公开

    公开(公告)号:US20240070432A1

    公开(公告)日:2024-02-29

    申请号:US18456098

    申请日:2023-08-25

    Inventor: Koki NAKANISHI

    CPC classification number: G06K19/07775 G06K19/0775

    Abstract: An IC tag includes: an antenna that receives a modulation signal in which a pause period, during which a carrier wave is interrupted, is intermittently present in a carrier wave signal; a clock signal extraction circuit that extracts, as a clock signal from the modulation signal received by antenna, a signal attained by binarizing the carrier wave included in the signal; a demodulation circuit that detects the received modulation signal to generate a binary detection signal; a control circuit that, during reception mode, restores a command data piece from the detection signal in synchronization with the clock signal and performs a process based on the command data piece; and a reset circuit unit that supplies, to the control circuit, a pause reset signal prompting a reset upon detecting the pause period in received modulation signal when the circuit is in a state other than the reception mode.

    AUDIO REPRODUCTION DEVICE AND AUDIO REPRODUCTION METHOD

    公开(公告)号:US20240034231A1

    公开(公告)日:2024-02-01

    申请号:US18356195

    申请日:2023-07-20

    CPC classification number: B60Q5/008

    Abstract: An audio reproduction device and method are provided. The audio reproduction device is connected to an external memory storing audio data series respectively corresponding to audio phrases and storing management information indicating an address at which each of the plurality of audio data series is stored, and perform reproduction of audio by reading the audio data series from the external memory for each audio phrase. The audio reproduction device includes a serial interface performing serial communication, registers storing the management information corresponding to the audio data series of at least two audio phrases transmitted from the external memory via the serial interface, and a reproduction control circuit reading the audio data series from the external memory via the serial interface for each audio phrase based on the management information stored in the registers and reproducing audio in the order of reading the audio data series for each audio phrase.

    Load driving circuit, display driver, display apparatus and semiconductor device

    公开(公告)号:US11862058B2

    公开(公告)日:2024-01-02

    申请号:US17989660

    申请日:2022-11-17

    Inventor: Hiroshi Tsuchi

    Abstract: Provided is an output amplifier having: a push-pull output-stage formed by first and second output-stage transistors; and a detection circuit detecting an abnormal output current output by the output amplifier and including: a coupling circuit, generating first and second currents mirroring current flowing in the first output-stage transistor and third and fourth currents mirroring current flowing in the second output-stage transistor, coupling the first and third currents at a first output node, outputting a first voltage at the first output node, coupling the second and fourth currents at a second output node, and outputting a second voltage at the second output node; and a determination circuit, outputting a determination signal indicating normality of an output current based on the first and second voltages. The coupling circuit generates the first to fourth currents. In the reference state, the third current >the first current, the second current >the fourth current.

    DISPLAY DRIVER AND DISPLAY DEVICE
    27.
    发明公开

    公开(公告)号:US20230360569A1

    公开(公告)日:2023-11-09

    申请号:US18345965

    申请日:2023-06-30

    Abstract: A display driver includes an amplifier circuit that outputs an output current based on a differential signal indicating a difference between a gradation voltage corresponding to a video signal and an output voltage to a source line of a display panel, thereby supplying the output voltage to the source line. An output current detection circuit generates a mirror current by copying the output current, and outputs an output current detection signal representing the mirror current. A failure determination circuit determines whether a failure is occurring or has occurred in the source line or not by comparing the level of the output current detection signal with a prescribed threshold value. The output current detection circuit includes a transistor that generates a mirror current by receiving the differential signal at a gate thereof, and a variable resistance that generates an output current detection signal upon receiving the generated mirror current.

    Oscillator circuit
    28.
    发明授权

    公开(公告)号:US11799459B2

    公开(公告)日:2023-10-24

    申请号:US17705813

    申请日:2022-03-28

    Inventor: Seiichiro Sasaki

    Abstract: An oscillator circuit includes a first comparator that outputs a first signal indicative of a comparison result between an input potential and a threshold, a second comparator that outputs a second signal indicative of a comparison result between an input potential and the threshold, a RS flip-flop circuit that receives the first signal and the second signal and outputs first and second oscillation signals, a first charge/discharge unit that charges and discharges a first capacitor based on the first oscillation signal, a second charge/discharge unit that charges and discharges a second capacitor based on the second oscillation signal, a first dummy switch controlled to be on and off according to the second oscillation signal and adding a predetermined capacity to a first node, and a second dummy switch controlled to be on and off according to the first oscillation signal and adding a predetermined capacity to a second node.

    SEMICONDUCTOR DEVICE
    30.
    发明公开

    公开(公告)号:US20230318583A1

    公开(公告)日:2023-10-05

    申请号:US18187667

    申请日:2023-03-22

    CPC classification number: H03K3/02337 H03K5/2481

    Abstract: A semiconductor device includes: a first input to which an input signal is input; a second input to which a reference signal is input; and a comparison stage which includes a current source connected to a first potential and first and second current path parts connected between the current source and a second potential different from the first potential and performing a comparison operation in response to the input signal and the reference signal, wherein the first and second current path parts respectively include first and second input circuits which are connected to the current source and first and second load circuits which are connected between the second potential and the first and second input circuits, wherein the first input circuit includes a first signal transistor and a first reference transistor, and wherein the second input circuit includes a second signal transistor and a second reference transistor.

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