Method and system for digital frequency clocking in processor cores
    21.
    发明授权
    Method and system for digital frequency clocking in processor cores 有权
    处理器核心数字频率计时方法和系统

    公开(公告)号:US07917799B2

    公开(公告)日:2011-03-29

    申请号:US11734375

    申请日:2007-04-12

    CPC classification number: G06F1/10 G06F1/3203 G06F1/324 Y02D10/126

    Abstract: Disclosed are a method of and system for digital frequency clocking in a processor core. At least one-processor core is provided, and that processor core has a clocking subsystem for generating an output clock signal, which may be an analog signal at a variable frequency. Digital frequency control data are transmitted or distributed to the processor core; and that one processor core receives the digital frequency control data transmitted to the core, and uses that received digital frequency control data to set the frequency of the output clock signal of the clocking subsystem of the processor core. Preferably, multiple cores are asynchronously clocked and the core frequencies are independently set, and, there is no phase relationship between the core clocks.

    Abstract translation: 公开了处理器核心中的数字频率时钟的方法和系统。 提供至少一个处理器核心,并且处理器核心具有用于产生输出时钟信号的时钟子系统,其可以是可变频率的模拟信号。 数字频率控制数据被发送或分发到处理器核心; 并且一个处理器核心接收发送到核心的数字频率控制数据,并且使用该接收到的数字频率控制数据来设置处理器核心的时钟子系统的输出时钟信号的频率。 优选地,多个核被异步计时,并且核心频率被独立设置,并且核心时钟之间没有相位关系。

    Method for reducing bandwidth loss in data center applications with multiple fiber type connectivity
    22.
    发明授权
    Method for reducing bandwidth loss in data center applications with multiple fiber type connectivity 失效
    减少具有多光纤类型连接的数据中心应用带宽损耗的方法

    公开(公告)号:US07773844B2

    公开(公告)日:2010-08-10

    申请号:US12121908

    申请日:2008-05-16

    CPC classification number: G02B6/262 G02B6/3809 G02B6/381

    Abstract: A communications coupling for a low bandwidth fiber optic cable and a high bandwidth fiber optic cable, includes: a guiding ferrule adapted for coupling to a surrogate fiber optic cable comprised of one of the low bandwidth fiber optic cable and the high bandwidth fiber optic cable, the guiding ferrule including at least one mounting feature for aligning the guiding ferrule with an optical axis of the surrogate cable; the guiding ferrule further including at least one guiding feature for aligning the optical axis of the surrogate fiber optic cable with an optical axis of a connecting fiber optic cable, the connecting fiber optic cable comprised of the other one of the low bandwidth fiber optic cable and the high bandwidth fiber optic cable. A method and a communications infrastructure are provided.

    Abstract translation: 用于低带宽光纤电缆和高带宽光纤电缆的通信耦合器包括:适于耦合到由低带宽光纤电缆和高带宽光纤电缆之一组成的替代光纤电缆的引导套圈, 所述引导套圈包括用于使所述引导套圈与所述代理电缆的光轴对准的至少一个安装特征; 所述引导套圈还包括至少一个引导特征,所述引导特征用于使所述替代光纤电缆的光轴与连接光纤电缆的光轴对准,所述连接光纤电缆由所述低带宽光纤电缆中的另一个和 高带宽光纤电缆。 提供了一种方法和通信基础设施。

    Byte-wide optical backplane switching method
    23.
    发明授权
    Byte-wide optical backplane switching method 失效
    字节宽光背板切换方式

    公开(公告)号:US07616889B2

    公开(公告)日:2009-11-10

    申请号:US11851509

    申请日:2007-09-07

    CPC classification number: H04Q11/0005 H04Q2011/003 H04Q2011/0052

    Abstract: A byte-wide optical switch and switching method are provided. The optical switch includes a first set of ports for receiving in parallel an optical byte of data, and multiple second sets of ports each capable of outputting in parallel the optical byte of data. An array of optical switching elements is disposed between the first set of ports and the multiple second sets of ports. The array of optical switching elements direct the optical byte of data in parallel from the first set of ports to at least one second set of ports of the multiple second sets of ports. The switching elements may comprise micro-electro mechanical system (MEMS) devices, each having a position controllable reflective surface. Thin film optical filters can be provided on the reflective surfaces for wavelength selective switching.

    Abstract translation: 提供了一个字节宽的光开关和切换方法。 光学开关包括用于并行地接收数据的光学字节的第一组端口以及能够并行地输出数据的光学字节的多个第二组端口。 一组光开关元件设置在第一组端口和多个第二组端口之间。 光学开关元件阵列将数据的光学字节从第一组端口并行地引导到多个第二组端口的至少一个第二组端口。 开关元件可以包括微机电系统(MEMS)装置,每个微机械系统具有位置可控的反射表面。 可以在反射表面上提供薄膜光学滤波器用于波长选择性切换。

    METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR DATA SECURITY POLICY ENFORCEMENT
    24.
    发明申请
    METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR DATA SECURITY POLICY ENFORCEMENT 有权
    数据安全政策执行的方法,系统和计算机程序产品

    公开(公告)号:US20090165076A1

    公开(公告)日:2009-06-25

    申请号:US11959575

    申请日:2007-12-19

    CPC classification number: H04L63/0227 H04L63/0428 H04L69/04

    Abstract: A method for data security policy enforcement including inspecting incoming and outgoing data packets from a server computing device for attributes in accordance with a data security policy, processing the data packets in accordance with the security policy based on the inspected attributes, and routing the data packets in accordance with the security policy based on the inspected attributes, wherein incoming and outgoing data from the server computing device composed of the data packets is processed and routed in accordance with the security policy on a per-packet basis. A system and computer program product is also provided.

    Abstract translation: 一种用于数据安全策略实施的方法,包括根据数据安全策略检查来自服务器计算设备的传入和传出数据分组的属性,根据所检查的属性根据安全策略处理数据分组,以及路由数据分组 根据基于被检查属性的安全策略,其中来自由数据分组组成的服务器计算设备的传入和传出数据根据每个分组的安全策略进行处理和路由。 还提供了系统和计算机程序产品。

    Method, system, and computer program product for encryption key management in a secure processor vault
    25.
    发明申请
    Method, system, and computer program product for encryption key management in a secure processor vault 有权
    方法,系统和计算机程序产品,用于安全处理器库中的加密密钥管理

    公开(公告)号:US20090161877A1

    公开(公告)日:2009-06-25

    申请号:US11959560

    申请日:2007-12-19

    CPC classification number: H04L9/32 H04L9/0822 H04L9/0891 H04L2209/60

    Abstract: A method for encryption key management including accepting authenticated unencrypted data into a processor of a server computing device that is configured as a private key secure processor vault, the operation of which is isolated from other components of the server computing device thereby preventing unauthorized access to the processor and the data contents therein; encrypting the authenticated unencrypted data based on an existing private key stored in the processor thereby converting it to encrypted data; and transmitting the encrypted data out of the processor. A system and computer program product is also provided.

    Abstract translation: 一种用于加密密钥管理的方法,包括将认证的未加密数据接收到被配置为专用密钥安全处理器仓库的服务器计算设备的处理器中,其操作与服务器计算设备的其他组件隔离,从而防止未经授权的访问 处理器及其中的数据内容; 基于存储在处理器中的现有专用密钥加密经认证的未加密数据,从而将其转换为加密数据; 以及将所述加密数据发送出所述处理器。 还提供了系统和计算机程序产品。

    METHOD OF OPTIMIZING PERFORMANCE OF MULTI-CORE CHIPS AND CORRESPONDING CIRCUIT AND COMPUTER PROGRAM PRODUCT
    26.
    发明申请
    METHOD OF OPTIMIZING PERFORMANCE OF MULTI-CORE CHIPS AND CORRESPONDING CIRCUIT AND COMPUTER PROGRAM PRODUCT 有权
    优化多芯片和相应电路和计算机程序产品性能的方法

    公开(公告)号:US20080282074A1

    公开(公告)日:2008-11-13

    申请号:US11747300

    申请日:2007-05-11

    Abstract: A method of optimizing performance of a multi-core chip having a plurality of cores includes the steps of determining a Vdd-frequency SCHMOO characteristic for each of the plurality of cores individually; saving data indicative of the Vdd-frequency SCHMOO characteristics for each of the plurality of cores; configuring the cores to obtain a configuration providing at least one of optimum power consumption and optimum performance, for a given workload, based on the saved data; and saving the configuration such that it may be updated and used on at least one of a periodic and a continual basis.

    Abstract translation: 一种优化具有多个核心的多核芯片的性能的方法包括以下步骤:分别为多个核心中的每一个确定一个Vdd-frequency频率SCHMOO特性; 保存表示所述多个核心中的每一个的Vdd频率SCHMOO特性的数据; 基于所保存的数据,配置所述核以获得为给定工作负载提供至少一个最佳功耗和最佳性能的配置; 并且保存配置,使得可以在周期性和持续性的至少一个上更新和使用配置。

    Hybrid optical/electronic structures fabricated by a common molding process
    27.
    发明授权
    Hybrid optical/electronic structures fabricated by a common molding process 失效
    通过普通成型工艺制造的混合光学/电子结构

    公开(公告)号:US07391572B2

    公开(公告)日:2008-06-24

    申请号:US11365011

    申请日:2006-03-01

    CPC classification number: B29D11/00365 C03B19/02

    Abstract: Disclosed is a method of fabricating a molded structure including both micro lenses and metallic pins. The method comprises the steps of providing a mold apparatus having a set of first cavities and a set of second cavities, depositing a first material in the first cavities to form a set of metallic pins, and depositing a second material in the second cavities to form a set of micro lenses. The formed molded structure comprises a substrate, a set of molded microlenses on said substrate, and a set of molded metallic pins on that same substrate. The metallic pins may be formed as alignment pins or as electrical connectors. The invention enables the micro lenses and metallic pins to be manufactured by way of molding on a common substrate for the first time.

    Abstract translation: 公开了一种制造包括微透镜和金属针的模制结构的方法。 该方法包括以下步骤:提供具有一组第一空腔和一组第二空腔的模具设备,在第一空腔中沉积第一材料以形成一组金属销,以及在第二空腔中沉积第二材料以形成 一组微型镜头。 成型的模制结构包括基底,在所述基底上的一组模制的微透镜,以及在同一基底上的一组模制的金属针。 金属销可以形成为对准销或电连接器。 本发明能够通过在公共基板上成型第一次来制造微透镜和金属销。

    Method and system for synchronizing optical clocks
    28.
    发明授权
    Method and system for synchronizing optical clocks 失效
    用于同步光时钟的方法和系统

    公开(公告)号:US07197249B2

    公开(公告)日:2007-03-27

    申请号:US09962500

    申请日:2001-09-25

    CPC classification number: G06F1/12 G06F1/105 H04L7/0008 H04L7/0075

    Abstract: A method and system for synchronizing a local optical clock with a master optical clock, wherein the local clock generates a local clock signal at a local clock wavelength, and said master clock generates a master clock signal at a master clock wavelength. The method comprises the steps of dithering the wavelengths of the local and master clock signals, and generating a control signal representing the difference between the dithered wavelengths of the local and master clock signals. That control signal is then used to synchronize the local clock with the master clock. Preferably, a wavelength-locked loop is used as a means of phase or wavelength control for the optically distributed clock signals. The wavelength-locked loop provides a technique to control the wavelength of a local optical clock source in a manner that will allow the local clock to follow variations in the wavelength of another optical signal.

    Abstract translation: 一种用于使本地光时钟与主光时钟同步的方法和系统,其中本地时钟以本地时钟波长生成本地时钟信号,并且所述主时钟以主时钟波长生成主时钟信号。 该方法包括以下步骤:使本地和主时钟信号的波长抖动,并产生表示本地和主时钟信号的抖动波长之差的控制信号。 然后,该控制信号用于将本地时钟与主时钟同步。 优选地,使用波长锁定环作为用于光分布式时钟信号的相位或波长控制的手段。 波长锁定环路提供了一种技术,可以以允许本地时钟跟随另一光信号的波长变化的方式来控制本地光时钟源的波长。

    WDMA free space broadcast technique for optical backplanes and interplanar communications
    29.
    发明授权
    WDMA free space broadcast technique for optical backplanes and interplanar communications 失效
    WDMA自由空间广播技术,用于光背板和平面间通信

    公开(公告)号:US06970649B2

    公开(公告)日:2005-11-29

    申请号:US10011926

    申请日:2001-10-30

    CPC classification number: H04B10/801 H04J14/02

    Abstract: A wavelength Division Multiple Access (WDMA) free space broadcast technique for optical backplanes and interplanar communications for providing free space optical interconnects between multiple circuit cards in a computer system or networking device which is compatible with existing electrical backplanes. Current equipment can easily be upgraded in the field to take advantage of this new approach by simply replacing existing printed circuit boards, without requiring a complete redesign of the copper backplane.

    Abstract translation: 用于光背板和面间通信的波分多址(WDMA)自由空间广播技术,用于在与现有电气背板兼容的计算机系统或网络设备中的多个电路卡之间提供自由空间光互连。 现有设备可以在现场轻松升级,以便通过简单地更换现有的印刷电路板来利用这种新方法,而无需完全重新设计铜背板。

    Method, system, and program product for feedback control of a target system utilizing imposition of a periodic modulating signal onto a command signal
    30.
    发明申请
    Method, system, and program product for feedback control of a target system utilizing imposition of a periodic modulating signal onto a command signal 失效
    用于使用将周期性调制信号施加在命令信号上的目标系统的反馈控制的方法,系统和程序产品

    公开(公告)号:US20050248305A1

    公开(公告)日:2005-11-10

    申请号:US10839642

    申请日:2004-05-04

    CPC classification number: H02P6/182 H02P25/03 H02P2209/07

    Abstract: Feedback control of a target system is provided which utilizes the imposition of a periodic modulating signal onto a command signal of a controller. The command signal with the period modulating signal imposed thereon is input to the target system to be controlled. A response of the target system to a manifestation of the periodic modulating signal in the command signal is detected, and a feedback signal is produced from the detected response. The periodic modulating signal and the feedback signal are processed together to produce an error signal, and the command signal is modified in accordance with the error signal to drive the current state of the target system toward a desired state, wherein the periodic modulating signal facilitates control of the target system.

    Abstract translation: 提供了一种目标系统的反馈控制,其利用在控制器的命令信号上施加周期性调制信号。 具有施加在其上的周期调制信号的命令信号被输入到要控制的目标系统。 检测到目标系统对命令信号中的周期性调制信号的表现的响应,并根据检测到的响应产生反馈信号。 周期性调制信号和反馈信号被一起处理以产生误差信号,并且根据误差信号修改命令信号,以将目标系统的当前状态驱动到期望状态,其中周期调制信号有助于控制 的目标系统。

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