公开(公告)号：US20100206353A1

公开(公告)日：2010-08-19

申请号：US12770080

申请日：2010-04-29

Applicant: Jing-Meng Liu

Inventor： Jing-Meng Liu

IPC: H01L31/042

CPC classification number: G05F1/67 ,  H02J7/35 ,  Y02E10/566 ,  Y02E10/58 ,  Y10T307/50

Abstract: The present invention discloses an analog photovoltaic power circuit, comprising: a photovoltaic device group for receiving photo energy to generate an input voltage; a power stage circuit for converting the input voltage to an output voltage; an optimum voltage estimation circuit for receiving a predetermined voltage and estimating an optimum voltage according to a direction of variation of the input voltage and a direction of variation of the power generated by the photovoltaic device group; and an analog comparison and control circuit for comparing the optimum voltage with the input voltage, to thereby control the operation of the power stage circuit.

Abstract translation: 本发明公开了一种模拟光伏电力电路，包括：用于接收光能以产生输入电压的光伏器件组; 用于将输入电压转换为输出电压的功率级电路; 用于接收预定电压并根据输入电压的变化方向和由光伏器件组产生的电力的变化方向估计最佳电压的最佳电压估计电路; 以及用于将最佳电压与输入电压进行比较的模拟比较和控制电路，从而控制功率级电路的操作。

公开(公告)号：US07768033B2

公开(公告)日：2010-08-03

申请号：US12385720

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

公开(公告)号：US07759695B2

公开(公告)日：2010-07-20

申请号：US12385717

申请日：2009-04-17

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract translation: 单芯片公共漏极JFET器件包括漏极，两个栅极和两个源极，使得与其形成两个公共漏极JFET。 由于在单个芯片内合并的两个JFET，其间不需要引线接合连接，因此没有由接合线引起的寄生电感和电阻，因此提高性能并降低封装成本。 单片式公共漏极JFET器件可以应用于降压转换器，升压转换器，反相转换器，开关和两级DC-DC转换器，以提高其性能和效率。 还提供了用于电流感测或比例电流产生的替代单芯片公共漏极JFET器件。

公开(公告)号：US20100084991A1

公开(公告)日：2010-04-08

申请号：US12327830

申请日：2008-12-04

Applicant: Jing-Meng Liu ,  Chiawei Liao ,  Leng-Nien Hsiu

Inventor： Jing-Meng Liu ,  Chiawei Liao ,  Leng-Nien Hsiu

IPC: H05B37/02

CPC classification number: H05B33/0848

Abstract: The present invention discloses a dimming control circuit, comprising: an input terminal for receiving an input signal; an analog and digital dimming circuit receiving the input signal, wherein the analog and digital dimming circuit provides an analog dimming function when a voltage level of the input signal is between a predetermined lower limit and a predetermined upper limit, and a digital dimming function when the voltage level of the input signal switches above and below the predetermined lower limit, and wherein the analog and digital dimming circuit generates an analog signal when the voltage level of the input signal is above the predetermined lower limit; and a power circuit for supplying an output current in correspondence to the analog signal generated by the analog and digital dimming circuit.

Abstract translation: 本发明公开了一种调光控制电路，包括：输入端，用于接收输入信号; 接收输入信号的模拟和数字调光电路，其中当输入信号的电压电平在预定的下限和预定的上限之间时，模拟和数字调光电路提供模拟调光功能，当数字调光功能在 输入信号的电压电平高于和低于预定下限，并且其中当输入信号的电压电平高于预定下限时，模拟和数字调光电路产生模拟信号; 以及用于对应于由模拟和数字调光电路产生的模拟信号提供输出电流的电源电路。

公开(公告)号：US07656133B2

公开(公告)日：2010-02-02

申请号：US12385020

申请日：2009-03-30

Applicant: Chung-Lung Pai ,  Kwan-Jen Chu ,  Chun-Yen Huang ,  Jing-Meng Liu

Inventor： Chung-Lung Pai ,  Kwan-Jen Chu ,  Chun-Yen Huang ,  Jing-Meng Liu

IPC: H02J7/00

CPC classification number: H05B41/32 ,  H02M3/33507

Abstract: In a capacitor charger including a transformer having a primary winding connected with an input voltage and a secondary winding for transforming a primary current flowing through the primary winding to a secondary current flowing through the secondary winding, the primary current is adjusted according to a monitoring voltage varying with the input voltage, thereby prolonging the lifetime of the battery that provides the input voltage and improving the power efficiency of the battery.

Abstract translation: 在包括具有与输入电压连接的初级绕组的变压器的电容器充电器和用于将流过初级绕组的初级电流变换为流过次级绕组的次级电流的次级绕组的情况下，根据监视电压来调整初级电流 随着输入电压而变化，从而延长提供输入电压的电池的寿命并提高电池的功率效率。

公开(公告)号：US20090317630A1

公开(公告)日：2009-12-24

申请号：US12376184

申请日：2007-10-12

Applicant: Meng Liu ,  Zhixin Li

Inventor： Meng Liu ,  Zhixin Li

IPC: B32B5/00 ,  B05D1/36

CPC classification number: B05D5/06 ,  B05D3/06 ,  B05D7/52 ,  B05D7/56 ,  H01H2009/187 ,  H01H2209/002 ,  H01H2209/016 ,  H01H2229/02 ,  Y10T428/265

Abstract: Disclosed herein is a multi-layer coated product comprising a substrate, and a multi-layer coating including an undercoat and a topcoat which are formed on the substrate in sequence, have alcohol resistance, and are in a different color from each other, wherein the multi-layer coating further includes an intermediate coat having no alcohol resistance between the undercoat and the topcoat. Also disclosed herein is a method for preparing the multi-layer coated product. Since the intermediate coat of the multi-layer coated product has no alcohol resistance, when the intermediate coat and topcoat on the backlight part is removed by the laser engraving, it is sufficient that the laser intensity is controlled to be higher than the laser intensity required for completely removing the topcoat and lower than the laser intensity that affects the undercoat, the time required for determining the laser intensity and scrubbing can be shortened, and thereby the production efficiency of said multi-layer coated product can be improved.

Abstract translation: 本文公开了包含基材的多层涂层产品，以及依次形成在基材上的底涂层和面漆的多层涂层具有耐醇性，并且彼此不同的颜色，其中， 多层涂层还包括在底涂层和顶涂层之间不具有耐醇性的中间涂层。 本文还公开了制备多层涂覆产品的方法。 由于多层涂层产品的中间涂层不具有耐醇性，当通过激光雕刻去除背光部件上的中间涂层和顶涂层时，激光强度被控制为高于所需的激光强度就足够了 为了完全除去面漆并且低于影响底涂层的激光强度，可以缩短确定激光强度和擦洗所需的时间，从而可以提高所述多层涂布产品的生产效率。

公开(公告)号：US20090243722A1

公开(公告)日：2009-10-01

申请号：US12382762

申请日：2009-03-24

Applicant: Jing-Meng Liu ,  Jwin-Yen Guo ,  Shao-Ming Sun

Inventor： Jing-Meng Liu ,  Jwin-Yen Guo ,  Shao-Ming Sun

IPC: H03F3/217

CPC classification number: H03F3/2173 ,  H03F1/26 ,  H03F2200/03 ,  H03F2200/114 ,  H03F2200/351

Abstract: A switching amplifier has a network including current sources and resistors connected to the two output terminals of the H-bridge of the switching amplifier, to provide a small current to the load connected between the two output terminals at zero input, whereby the common mode voltage bouncing is reduced and the switching amplifier has less power consumption and reduced electro-magnetic interference.

Abstract translation: 开关放大器具有包括连接到开关放大器的H桥的两个输出端的电流源和电阻器的网络，以在零输入处向连接在两个输出端子之间的负载提供小电流，由此共模电压 弹跳减少，开关放大器功耗更低，电磁干扰减少。

公开(公告)号：US20090195221A1

公开(公告)日：2009-08-06

申请号：US12385020

申请日：2009-03-30

Applicant: Chung-Lung Pai ,  Kwan-Jen Chu ,  Chun-Yen Huang ,  Jing-Meng Liu

Inventor： Chung-Lung Pai ,  Kwan-Jen Chu ,  Chun-Yen Huang ,  Jing-Meng Liu

IPC: H02J7/00

CPC classification number: H05B41/32 ,  H02M3/33507

Abstract: In a capacitor charger including a transformer having a primary winding connected with an input voltage and a secondary winding for transforming a primary current flowing through the primary winding to a secondary current flowing through the secondary winding, the primary current is adjusted according to a monitoring voltage varying with the input voltage, thereby prolonging the lifetime of the battery that provides the input voltage and improving the power efficiency of the battery.

公开(公告)号：US07535032B2

公开(公告)日：2009-05-19

申请号：US11165028

申请日：2005-06-24

Applicant: Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

Inventor： Liang-Pin Tai ,  Jing-Meng Liu ,  Hung-Der Su

IPC: H01L29/74 ,  H01L31/111

CPC classification number: H01L27/098 ,  H01L27/0744 ,  H01L29/7722 ,  H01L29/8083

Abstract: A single-chip common-drain JFET device comprises a drain, two gates and two source arranged such that two common-drain JFETs are formed therewith. Due to the two JFETs merged within a single chip, no wire bonding connection is needed therebetween, thereby without parasitic inductance and resistance caused by bonding wire, and therefore improving the performance and reducing the package cost. The single-chip common-drain JFET device may be applied in buck converter, boost converter, inverting converter, switch, and two-step DC-to-DC converter to improve their performance and efficiency. Alternative single-chip common-drain JFET devices are also provided for current sense or proportional current generation.

Abstract translation: 单芯片公共漏极JFET器件包括漏极，两个栅极和两个源极，使得与其形成两个公共漏极JFET。 由于在单个芯片内合并的两个JFET，其间不需要引线接合连接，因此没有由接合线引起的寄生电感和电阻，因此提高性能并降低封装成本。 单片式公共漏极JFET器件可以应用于降压转换器，升压转换器，反相转换器，开关和两级DC-DC转换器，以提高其性能和效率。 还提供了用于电流感测或比例电流产生的替代单芯片公共漏极JFET器件。

公开(公告)号：US20090115389A1

公开(公告)日：2009-05-07

申请号：US12349130

申请日：2009-01-06

Applicant: Kwan-Jen Chu ,  Chung-Lung Pai ,  Po-Shun Chung ,  Jing-Meng Liu

Inventor： Kwan-Jen Chu ,  Chung-Lung Pai ,  Po-Shun Chung ,  Jing-Meng Liu

IPC: G05F1/10

CPC classification number: H02M3/156

Abstract: A pulse width modulation (PWM) Regulator System with automatically switching pulse skipping mode (PSM) is disclosed. The PWM regulator system comprises a PWM regulator, a PSM switching module and a pulse generator. The PWM regulator converts the input voltage by PWM. The PSM switching module determines to enter or exit the PSM. The pulse generator adaptively produces pulse signal for the switching regulator to operate in PSM.

Abstract translation: 公开了具有自动切换脉冲跳跃模式（PSM）的脉冲宽度调制（PWM）调节器系统。 PWM调节器系统包括PWM调节器，PSM开关模块和脉冲发生器。 PWM调节器通过PWM转换输入电压。 PSM切换模块确定进入或退出PSM。 脉冲发生器自适应地产生用于开关调节器的脉冲信号以在PSM中操作。