公开(公告)号：US10180669B2

公开(公告)日：2019-01-15

申请号：US14768606

申请日：2014-02-12

申请人： Kota Sata ,  Junichi Kako ,  Satoru Watanabe ,  Yuta Suzuki ,  Masato Edahiro

发明人： Kota Sata ,  Junichi Kako ,  Satoru Watanabe ,  Yuta Suzuki ,  Masato Edahiro

IPC分类号： G05B17/02

摘要： The present invention relates to a control device design method for a control device that determines a manipulation amount of a control object having a dead time by feedback control so as to bring a control amount of the control object closer to a target value. The method according to the present invention includes a step of designing a feedback loop that computes a correction amount for the manipulation amount using a plurality of controllers including a prediction model of the control object, a step of deriving the same number of delay elements as the plurality of controllers from a dead time element of the prediction model, and a step of allocating the plurality of controllers associated with the delay elements to a plurality of arithmetic units so that the computation of the feedback loop is performed by parallel computation by the plurality of arithmetic units that operate in parallel.

公开(公告)号：US08935510B2

公开(公告)日：2015-01-13

申请号：US12447513

申请日：2007-11-01

申请人： Hiroaki Inoue ,  Junji Sakai ,  Tsuyoshi Abe ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Junji Sakai ,  Tsuyoshi Abe ,  Masato Edahiro

IPC分类号： G06F15/80 ,  G06F9/50 ,  H04L29/08 ,  G06F9/44

CPC分类号： G06F9/5077 ,  G06F9/4405 ,  H04L29/08144 ,  H04L67/34

摘要： For flexibly setting up an execution environment according to contents of processing to be executed while taking stability or a security level into consideration, the multiple processor system includes the execution environment main control unit 10 which determines CPU assignment at the time of deciding CPU assignment, the execution environment sub control unit 20 which controls starting, stopping and switching of an execution environment according to an instruction from the execution environment main control unit 10 to synchronize with the execution environment main control unit 10, and the execution environment management unit 30 which receives input of management information or reference refusal information of shared resources for each CPU 4 or each execution environment 100 to separate the execution environment main control unit 10 from the execution environment sub control units 20a through 20n, or the execution environment sub control units 20a through 20n from each other.

摘要翻译： 为了在考虑到稳定性或安全级别的同时根据要执行的处理的内容灵活地设置执行环境，多处理器系统包括确定CPU分配时的CPU分配的执行环境主控制单元10， 执行环境子控制单元20，其根据来自执行环境主控制单元10的指令来控制执行环境的启动，停止和切换，以与执行环境主控制单元10同步;以及执行环境管理单元30，其接收输入 对于每个CPU 4或每个执行环境100的共享资源的管理信息或参考拒绝信息，以将执行环境主控制单元10与执行环境子控制单元20a至20n或执行环境子控制单元20a至20n分离 彼此。

公开(公告)号：US20100031008A1

公开(公告)日：2010-02-04

申请号：US12518687

申请日：2007-12-04

申请人： Masato Edahiro ,  Yoshiko Yamashita

发明人： Masato Edahiro ,  Yoshiko Yamashita

IPC分类号： G06F9/06

CPC分类号： G06F7/22 ,  G06F7/36

摘要： A parallel sorting apparatus is provided whose sorting processing is speeded up. A reference value calculation section calculates a plurality of reference values serving as boundaries of intervals used for allocating input data depending on the magnitude of a value. An input data aggregation section partitions the input data into a plurality of input data regions, and calculates, by parallel processing, mapping information used for allocating data in each of the partitioned input data regions to the plurality of intervals that have boundaries on the reference values calculated by the reference value calculation section. A data allocation section allocates, by parallel processing, data in each of the input data regions to the plurality of intervals in accordance with the mapping information calculated by the input data aggregation section. An interval sorting section individually sorts, by parallel processing, data in the plurality of intervals allocated by the data allocation section.

摘要翻译： 提供了一种并行分拣装置，其分拣处理被加速。 参考值计算部分计算用作用于根据值的大小分配输入数据的间隔的边界的多个参考值。 输入数据聚合部分将输入数据分割成多个输入数据区域，并且通过并行处理计算用于将每个分割输入数据区域中的数据分配给具有参考值边界的多个间隔的映射信息 由参考值计算部分计算。 数据分配部根据由输入数据聚合部分计算出的映射信息，通过并行处理将每个输入数据区域中的数据分配到多个间隔。 间隔分类部分通过并行处理分别对由数据分配部分分配的多个间隔中的数据进行分类。

公开(公告)号：US06239406B1

公开(公告)日：2001-05-29

申请号：US09280827

申请日：1999-03-30

申请人： Yoshimi Onoma ,  Masato Edahiro

发明人： Yoshimi Onoma ,  Masato Edahiro

IPC分类号： B23K2638

CPC分类号： H01L21/76894 ,  B23K26/0853

摘要： A laser beam machining apparatus has machining apparatus including a laser oscillator, a stage for moving a workpiece in XY directions, and a central processing unit (CPU) for controlling laser emission of the laser oscillator and movement of the stage. The CPU causes the laser beam machining apparatus to group machining points on the workpiece into a plurality of segments, each segment being a set of machining points aligned parallel to one of the X axis and Y axis, to create a shortest route through the plurality of segments, to drive the stage along the shortest route, and to apply a laser beam on the machining points on the shortest route.

摘要翻译： 激光束加工装置具有激光振荡器，XY工件移动台以及控制激光振荡器的激光发射的中央处理单元（CPU）的加工装置。 CPU使激光束加工装置将工件上的加工点分组成多个段，每个段是与X轴和Y轴之一平行排列的一组加工点，以创建通过多个 沿最短路线驱动舞台，并在最短路线的加工点上施加激光束。

公开(公告)号：US10241483B2

公开(公告)日：2019-03-26

申请号：US14768606

申请日：2014-02-12

申请人： Kota Sata ,  Junichi Kako ,  Satoru Watanabe ,  Yuta Suzuki ,  Masato Edahiro

发明人： Kota Sata ,  Junichi Kako ,  Satoru Watanabe ,  Yuta Suzuki ,  Masato Edahiro

IPC分类号： G05B17/02

摘要： The present invention relates to a control device design method for a control device that determines a manipulation amount of a control object having a dead time by feedback control so as to bring a control amount of the control object closer to a target value. The method according to the present invention includes a step of designing a feedback loop that computes a correction amount for the manipulation amount using a plurality of controllers including a prediction model of the control object, a step of deriving the same number of delay elements as the plurality of controllers from a dead time element of the prediction model, and a step of allocating the plurality of controllers associated with the delay elements to a plurality of arithmetic units so that the computation of the feedback loop is performed by parallel computation by the plurality of arithmetic units that operate in parallel.

公开(公告)号：US08620932B2

公开(公告)日：2013-12-31

申请号：US12518687

申请日：2007-12-04

申请人： Masato Edahiro ,  Yoshiko Yamashita

发明人： Masato Edahiro ,  Yoshiko Yamashita

IPC分类号： G06F17/30 ,  G06F7/00

CPC分类号： G06F7/22 ,  G06F7/36

摘要： A parallel sorting apparatus is provided whose sorting processing is speeded up. A reference value calculation section calculates a plurality of reference values serving as boundaries of intervals used for allocating input data depending on the magnitude of a value. An input data aggregation section partitions the input data into a plurality of input data regions, and calculates, by parallel processing, mapping information used for allocating data in each of the partitioned input data regions to the plurality of intervals that have boundaries on the reference values calculated by the reference value calculation section. A data allocation section allocates, by parallel processing, data in each of the input data regions to the plurality of intervals in accordance with the mapping information calculated by the input data aggregation section. An interval sorting section individually sorts, by parallel processing, data in the plurality of intervals allocated by the data allocation section.

摘要翻译： 提供了一种并行分拣装置，其分拣处理被加速。 参考值计算部分计算用作用于根据值的大小分配输入数据的间隔的边界的多个参考值。 输入数据聚合部分将输入数据分割成多个输入数据区域，并且通过并行处理计算用于将每个分割输入数据区域中的数据分配给具有参考值边界的多个间隔的映射信息 由参考值计算部分计算。 数据分配部根据由输入数据聚合部分计算出的映射信息，通过并行处理将每个输入数据区域中的数据分配到多个间隔。 间隔分类部分通过并行处理分别对由数据分配部分分配的多个间隔中的数据进行分类。

公开(公告)号：US08443377B2

公开(公告)日：2013-05-14

申请号：US11080730

申请日：2005-03-16

申请人： Hiroaki Inoue ,  Junji Sakai ,  Tsuyoshi Abe ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Junji Sakai ,  Tsuyoshi Abe ,  Masato Edahiro

IPC分类号： G06F3/00 ,  G06F13/00

CPC分类号： G06F9/544

摘要： On a parallel processing system by an OS for single processors which operates, on a multiprocessor, an OS for single processors and an existing application to realize parallel processing by the multiprocessor with respect to the application, each processor includes a communication proxy unit which transfers data between tasks spreading over the processors by proxy and the communication proxy unit on a processor in which a task on a transmission side operates holds information about an address, on a processor, of a task on a reception side to receive data transferred from the task on the transmission side as proxy for the task on the reception side.

摘要翻译： 在用于单处理器的操作系统的并行处理系统中，在多处理器上操作用于单个处理器的OS和现有应用以实现多处理器相对于应用的并行处理，每个处理器包括传送数据的通信代理单元 在处理器之间通过代理扩展的任务和处理器之间的通信代理单元，其中传输侧的任务在其上操作，在处理器上保存关于接收侧的任务的地址的信息，以接收从任务传送的数据 发送方作为接收方的任务的代理。

公开(公告)号：US08412867B2

公开(公告)日：2013-04-02

申请号：US12663477

申请日：2008-05-30

申请人： Hiroaki Inoue ,  Masamichi Takagi ,  Masaki Uekubo ,  Sunao Torii ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Masamichi Takagi ,  Masaki Uekubo ,  Sunao Torii ,  Masato Edahiro

IPC分类号： G06F13/12 ,  H04L12/56

CPC分类号： G06F15/16 ,  G06F21/50 ,  G06F21/577 ,  H04L29/06

摘要： A semiconductor integrated circuit of the invention comprises a plurality of cores, and an interconnecting network including adaptors connected to each of the cores and a plurality of routers connecting the adaptors to communicate therebetween. The adaptors keep delivery information indicating a delivery condition of a request signal received from the cores and control delivery of the request signal received from the cores in accordance with the delivery information.

摘要翻译： 本发明的半导体集成电路包括多个核心，以及包括连接到每个核心的适配器的互连网络以及连接适配器以在它们之间通信的多个路由器。 适配器保持指示从核心接收到的请求信号的传送条件的传送信息，并且根据传送信息控制从核心接收的请求信号的传送。

公开(公告)号：US20120331474A1

公开(公告)日：2012-12-27

申请号：US13579865

申请日：2011-02-02

申请人： Noriaki Suzuki ,  Masato Edahiro ,  Junji Sakai

发明人： Noriaki Suzuki ,  Masato Edahiro ,  Junji Sakai

IPC分类号： G06F9/50

CPC分类号： G06F9/4887 ,  G06F2209/483

摘要： Disclosed is an automatic optimization system capable of searching for an allocation with a good performance from among a plurality of task allocations which can be scheduled in a system of a development target configured with a plurality of periodic tasks. A task allocation optimization system for a multi-core processor including a plurality of cores calculates a response time of each of a plurality of tasks which are core allocation decision targets, and outputs an accumulative value of the calculated response time as an evaluation function value which is an index representing excellence of a task allocation. A task allocation from which a good evaluation function value is calculated is searched based on the evaluation function value. A candidate having a good evaluation function value among a plurality of searched task allocation candidates is held.

摘要翻译： 公开了能够从配置有多个周期性任务的开发目标的系统中调度的多个任务分配中搜索具有良好性能的分配的自动优化系统。 包括多个核的多核处理器的任务分配优化系统计算作为核心分配决定目标的多个任务中的每一个的响应时间，并将所计算的响应时间的累积值作为评估函数值输出， 是表示任务分配卓越的索引。 根据评价函数值搜索计算好评价函数值的任务分配。 保持在多个搜索到的任务分配候选中具有良好评价函数值的候选者。

公开(公告)号：US20090119541A1

公开(公告)日：2009-05-07

申请号：US11921742

申请日：2006-02-23

申请人： Hiroaki Inoue ,  Junji Sakai ,  Tsuyoshi Abe ,  Masaki Uekubo ,  Noriaki Suzuki ,  Masato Edahiro

发明人： Hiroaki Inoue ,  Junji Sakai ,  Tsuyoshi Abe ,  Masaki Uekubo ,  Noriaki Suzuki ,  Masato Edahiro

IPC分类号： G06F11/07 ,  G06F21/00

CPC分类号： G06F11/2028 ,  G06F9/4411 ,  G06F11/1482 ,  G06F11/1484 ,  G06F21/53 ,  G06F21/556 ,  G06F21/85 ,  G06F2221/2113

摘要： The information processing device which recovers a domain developing a fault caused by added application and device driver while maintaining security and reliability includes a plurality of processors, wherein the plurality of processors form a plurality of domains according to processing contents to be executed, and the processors in different domains communicate with each other through a communication unit, and which further includes a recovery unit for executing, for a domain developing a fault, failure recovery processing based on a failure recovery request notified by the domain and a recovery condition set in advance for each domain.

摘要翻译： 在维护安全性和可靠性的同时恢复由附加的应用和设备驱动程序引起的故障的域的信息处理设备包括多个处理器，其中，所述多个处理器根据要执行的处理内容形成多个域，并且处理器 在不同的域中通过通信单元相互通信，并且还包括恢复单元，用于针对发生故障的域执行基于所述域通知的故障恢复请求的故障恢复处理和预先设置的恢复条件 每个域。