Programmable rise/fall time control circuit
    24.
    发明申请
    Programmable rise/fall time control circuit 审中-公开
    可编程上升/下降时间控制电路

    公开(公告)号:US20070001101A1

    公开(公告)日:2007-01-04

    申请号:US11238425

    申请日:2005-09-28

    CPC classification number: H04N5/335 H04N5/3745 H04N5/376

    Abstract: An electronic device is provided such as a programmable rise/fall time control circuit, for example, that delivers a continuous and near linear rising/falling slope of a control signal, with programmability that can be implemented in future CMOS image sensor devices. This device includes a programmability block for reset or transfer gate signals. The programmability block includes two inputs: an input bias current and a signal from the control bits. The programmability block further includes two similar internal circuit blocks, one for generating a fall time control signal, and one for generating a rise time control signal. Additionally the programmability block includes two outputs; a fall time control signal, and a rise time control signal. The device further includes a reset or transfer gate buffer configured as an inverter. The reset or transfer gate buffer includes three input signals: The fall time control signal and rise time control signal from the programmability block, and an INT Reset signal. Furthermore, the reset or transfer gate buffer includes an output reset or transfer gate signal. The device is configured to take an input bias current, and by controlling the transconductance of internal circuitry provide a tapered rise and fall time signal to a reset or transfer gate of a CMOS image sensor that is programmable.

    Abstract translation: 提供了诸如可编程上升/下降时间控制电路的电子装置,其可以传递控制信号的连续和近似线性的上升/下降斜率,具有可在将来的CMOS图像传感器装置中实现的可编程性。 该器件包括用于复位或传输门信号的可编程块。 可编程块包括两个输入:输入偏置电流和来自控制位的信号。 可编程块还包括两个类似的内部电路块,一个用于产生下降时间控制信号,另一个用于产生上升时间控制信号。 此外,可编程块包括两个输出; 下降时间控制信号和上升时间控制信号。 该装置还包括被配置为反相器的复位或传输门缓冲器。 复位或传输门缓冲器包括三个输入信号:来自可编程块的下降时间控制信号和上升时间控制信号,以及一个INT复位信号。 此外,复位或传输门缓冲器包括输出复位或传输门信号。 该器件被配置为获取输入偏置电流,并且通过控制内部电路的跨导向可编程的CMOS图像传感器的复位或传输门提供渐变的上升和下降时间信号。

    Method and system for resetting image sensors
    27.
    发明授权
    Method and system for resetting image sensors 有权
    复位图像传感器的方法和系统

    公开(公告)号:US07067786B1

    公开(公告)日:2006-06-27

    申请号:US11083466

    申请日:2005-03-17

    CPC classification number: H04N5/363 H04N5/3597

    Abstract: An exemplary CMOS image sensor comprises a reset transistor, a photodiode, reset drain voltage circuitry, and reset gate voltage circuitry. A cathode of the photodiode is connected to a source of the reset transistor, and an anode of the photodiode is connected to ground. The reset drain voltage circuitry is connected to a drain of the reset transistor, and the reset gate voltage circuitry is connected to a gate of the reset transistor. During an exemplary hard reset operation, the reset drain voltage circuitry supplies a first drain voltage to the drain of the reset transistor in accordance with a determined level of light for exposure, which is determined dynamically. According to another exemplary reset operation, a hard reset phase is immediately followed by a soft reset phase.

    Abstract translation: 示例性CMOS图像传感器包括复位晶体管,光电二极管,复位漏极电压电路和复位栅极电压电路。 光电二极管的阴极连接到复位晶体管的源极,并且光电二极管的阳极连接到地。 复位漏极电压电路连接到复位晶体管的漏极,复位栅极电压电路连接到复位晶体管的栅极。 在示例性硬复位操作期间,复位漏极电压电路根据动态确定的用于曝光的光的水平,向复位晶体管的漏极提供第一漏极电压。 根据另一示例性的复位操作,硬复位阶段紧接着是软复位阶段。

    CMOS image sensor arrangement with reduced pixel light shadowing
    28.
    发明授权
    CMOS image sensor arrangement with reduced pixel light shadowing 有权
    CMOS图像传感器布置具有减少的像素光阴影

    公开(公告)号:US06838715B1

    公开(公告)日:2005-01-04

    申请号:US10425488

    申请日:2003-04-29

    Abstract: An exemplary CMOS image sensor comprises a plurality of pixels arranged in an array. The plurality of pixels includes a first pixel proximate an optical center of the array, and a second pixel proximate a peripheral edge of the array. The CMOS image sensor further comprises a first metal interconnect segment associated with the first pixel situated in a first metal layer, and a second metal interconnect segment associated with the second pixel situated in the first metal layer. The second metal interconnect segment is shifted closer to the optical center of the array than the first metal interconnect segment so that the second metal interconnect segment approximately aligns with a principle ray angle incident the second pixel, thereby reducing pixel light shadowing.

    Systems, Methods, and Apparatus for Providing Filtration
    29.
    发明申请
    Systems, Methods, and Apparatus for Providing Filtration 失效
    用于提供过滤的系统,方法和装置

    公开(公告)号:US20130014478A1

    公开(公告)日:2013-01-17

    申请号:US13180783

    申请日:2011-07-12

    CPC classification number: B01D46/0005 B01D46/2403 B01D46/4227 Y10T29/49826

    Abstract: Certain embodiments of the invention may include systems, methods, and apparatus for mounting filters. According to an example embodiment of the invention, a method is provided for mounting one or more filters in a housing with a tubesheet, an intermediate support, and a directional mount. The method can include providing a filter with a first filter section, manipulating the first filter section with respect to the intermediate support, and manipulating the first filter second end with respect to the intermediate support, where the first filter second end maintains its relative position with respect to the intermediate support, and the intermediate support is operable to engage with a second end of the directional mount.

    Abstract translation: 本发明的某些实施例可以包括用于安装过滤器的系统,方法和装置。 根据本发明的示例性实施例,提供了一种用于将一个或多个过滤器安装在具有管板,中间支撑件和定向安装件的壳体中的方法。 该方法可以包括提供具有第一过滤器部分的过滤器,相对于中间支撑件操纵第一过滤器部分,并相对于中间支撑件操纵第一过滤器第二端,其中第一过滤器第二端保持其相对位置与 相对于中间支撑件,并且中间支撑件可操作以与定向安装件的第二端接合。

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