Abstract:
Systems and methods are provided for identifying dark areas in images captured by encapsulated cameras or endoscopes and enhancing the visibility of the dark area using intensity stretch. For capsule or endoscope images, there are often some dark areas caused by inadequate lighting. The poor visibility of detailed features in the dark area may reduce the detection rate of anomaly. The present invention calls for a method to detect the dark area based on contour. The intensities inside and outside the dark area are evaluated and are used to generate intensity transformation to stretch intensity in the dark area while minimizing the impact on the image quality outside the dark area.
Abstract:
Systems and methods are provided for identifying dark areas in images captured by encapsulated cameras or endoscopes and enhancing the visibility of the dark area using intensity stretch. For capsule or endoscope images, there are often some dark areas caused by inadequate lighting. The poor visibility of detailed features in the dark area may reduce the detection rate of anomaly. The present invention calls for a method to detect the dark area based on contour. The intensities inside and outside the dark area are evaluated and are used to generate intensity transformation to stretch intensity in the dark area while minimizing the impact on the image quality outside the dark area.
Abstract:
There is provided a CMOS imager system for providing a viewable image having increased dynamic range including an image sensor including a number of sets of pixels. Each set of pixels is configured to receive one of a number of exposures and to generate image data corresponding to the received exposure in the interleaved mode. The image sensor is configured to operate in either an interleaved mode or a non-interleaved mode and to output the image data generated by each set of pixels as a frame of interleaved image data in the interleaved mode. The imager system further includes an interleaved image pipeline in communication with the image sensor, where the interleaved image pipeline is configured to receive the interleaved image data from the image sensor, combine the image data generated by each set of pixels corresponding to one of the exposures to form the viewable image.
Abstract:
The present invention relates to devices and methods for image sensing. In one aspect, the present invention relates to a device including a plurality of pixels, wherein each pixel includes a charge transfer device and photodetector, and each of the pixels has a pitch of about 3 microns or less. This aspect further includes a select transistor, a reset transistor, a source follower transistor, and a sense node, wherein the select transistor, the reset transistor, the source follower transistor, and the sense node are shared by the plurality of pixels.
Abstract:
A camera system uses one or more image sensor IC chips each having multiple pixel arrays on the same semiconductor substrate (i.e., “multiple pixel arrays on a chip”). In one embodiment, such a camera system includes: (a) optical components that create multiple images in close physical proximity of each other (e.g., within a few millimeters or centimeters); and (b) a single sensor substrate (“chip”) containing multiple 2-dimensional pixel arrays that are aligned to capture these multiple images, so as to convert the multiple images into electrical signal. The pixel arrays can be manufactured using a CCD or a CMOS compatible process. For manufacturing reasons, such a chip is typically two centimeters or less on a side. However, large chips can also be made. Optional electronic components for further signal processing of the captured images may be formed either on the sensor chip (i.e., in a “system-on-a-chip” implementation), or in a separate back-end application specific integrated circuit (ASIC). In addition, digital storage components, display elements, and wired or wireless communication links may also be included in any suitable combination to allow review and further processing of the captured images.
Abstract:
There is provided a CMOS imager system for providing a viewable image having increased dynamic range including an image sensor including a number of sets of pixels. Each set of pixels is configured to receive one of a number of exposures and to generate image data corresponding to the received exposure in the interleaved mode. The image sensor is configured to operate in either an interleaved mode or a non-interleaved mode and to output the image data generated by each set of pixels as a frame of interleaved image data in the interleaved mode. The imager system further includes an interleaved image pipeline in communication with the image sensor, where the interleaved image pipeline is configured to receive the interleaved image data from the image sensor, combine the image data generated by each set of pixels corresponding to one of the exposures to form the viewable image.
Abstract:
An improved CMOS sensor integrated circuit is disclosed, along with methods of making the circuit and computer readable descriptions of the circuit.
Abstract:
An electronic device is provided such as a programmable rise/fall time control circuit, for example, that delivers a continuous and near linear rising/falling slope of a control signal, with programmability that can be implemented in future CMOS image sensor devices. This device includes a programmability block for reset or transfer gate signals. The programmability block includes two inputs: an input bias current and a signal from the control bits. The programmability block further includes two similar internal circuit blocks, one for generating a fall time control signal, and one for generating a rise time control signal. Additionally the programmability block includes two outputs; a fall time control signal, and a rise time control signal. The device further includes a reset or transfer gate buffer configured as an inverter. The reset or transfer gate buffer includes three input signals: The fall time control signal and rise time control signal from the programmability block, and an INT Reset signal. Furthermore, the reset or transfer gate buffer includes an output reset or transfer gate signal. The device is configured to take an input bias current, and by controlling the transconductance of internal circuitry provide a tapered rise and fall time signal to a reset or transfer gate of a CMOS image sensor that is programmable.
Abstract:
A camera system uses one or more image sensor IC chips each having multiple pixel arrays on the same semiconductor substrate (i.e., “multiple pixel arrays on a chip”). In one embodiment, such a camera system includes: (a) optical components that create multiple images in close physical proximity of each other (e.g., within a few millimeters or centimeters); and (b) a single sensor substrate (“chip”) containing multiple 2-dimensional pixel arrays that are aligned to capture these multiple images, so as to convert the multiple images into electrical signal. The pixel arrays can be manufactured using a CCD or a CMOS compatible process. For manufacturing reasons, such a chip is typically two centimeters or less on a side. However, large chips can also be made. Optional electronic components for further signal processing of the captured images may be formed either on the sensor chip (i.e., in a “system-on-a-chip” implementation), or in a separate back-end application specific integrated circuit (ASIC). In addition, digital storage components, display elements, and wired or wireless communication links may also be included in any suitable combination to allow review and further processing of the captured images.