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21.
公开(公告)号:US12141590B2
公开(公告)日:2024-11-12
申请号:US17898306
申请日:2022-08-29
Inventor: Frederic Ruelle , Emmanuel Grandin , Bechir Jabri
IPC: G06F9/445 , G06F3/0482 , G06F9/4401 , G06F9/451
Abstract: System, method, and circuitry for generating content for a programmable computing device based on user-selected configuration information. A settings registry is generated based on the user's selections. The settings registry and the user selected configuration information is utilized to generate the content, such as code, data, parameters, settings, etc. When the content is provided to the programmable computing device, the content initializes, configures, or controls one or more software and hardware aspects of the programmable computing device, such as boot sequence configurations, internal peripheral configurations, states of the programmable computing device, transitions between states of the programmable computing device, etc., and various combinations thereof.
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公开(公告)号:US12039092B2
公开(公告)日:2024-07-16
申请号:US17544038
申请日:2021-12-07
Applicant: STMicroelectronics France , STMicroelectronics (Alps) SAS
Inventor: Julien Goulier , Pascal Bernon
CPC classification number: G06F21/755 , H03K3/037 , H03K3/84
Abstract: The present description concerns an integrated circuit including, between first and second terminals having a first voltage applied therebetween, a load configured to execute instructions, a circuit for delivering a digital signal having at least two bits from a binary signal and a current output digital-to-analog converter controlled by the digital signal and coupled between the first and second terminals in parallel with the load.
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公开(公告)号:US20240235907A9
公开(公告)日:2024-07-11
申请号:US18491212
申请日:2023-10-20
Applicant: STMicroelectronics France
Inventor: Florence Giry-Cassan
IPC: H04L27/227 , H03B5/12
CPC classification number: H04L27/2273 , H03B5/1228 , H03B2200/0078
Abstract: Embodiments provide a device that includes a first circuit having a first input to receive a first sine wave signal and a second input to receive a second sine wave signal in quadrature with respect to each other and a current mode logic gate having a first input coupled to a first output of the first circuit and a second input coupled to a second output of the first circuit. The first circuit configured to deliver a first square wave signal and a second square wave signal. The current mode logic gate is configured to deliver a third square wave signal at a first level and a fourth square wave signal at a second level when the first and second square wave signals are simultaneously at their first levels and the first square wave signal is ahead of the second square wave signal.
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公开(公告)号:US20240105730A1
公开(公告)日:2024-03-28
申请号:US18532984
申请日:2023-12-07
Inventor: Olivier WEBER , Christophe LECOCQ
IPC: H01L27/12 , H01L21/8238 , H01L21/84 , H01L27/02 , H01L27/092
CPC classification number: H01L27/1203 , H01L21/823807 , H01L21/84 , H01L27/0207 , H01L27/092
Abstract: An integrated circuit includes at least a first standard cell framed by two second standard cells. The three cells are disposed adjacent to each other, and each standard cell includes at least one NMOS transistor and at least one least one PMOS transistor located in and on a silicon-on-insulator substrate. The at least one PMOS transistor of the first standard cell has a channel including silicon and germanium. The at least one PMOS transistor of each second standard cell has a silicon channel and a threshold voltage different in absolute value from the threshold voltage of said at least one PMOS transistor of the first cell.
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25.
公开(公告)号:US12243937B2
公开(公告)日:2025-03-04
申请号:US17711597
申请日:2022-04-01
Inventor: Matthieu Nongaillard , Thomas Oheix
IPC: H01L29/778 , H01L27/12 , H01L29/20 , H01L29/205 , H01L29/872
Abstract: The disclosure concerns a device which comprises a stack of two high electron mobility transistors, referred to as first and second transistor, separated by an insulating layer and each provided with a stack of semiconductor layers respectively referred to as first stack and second stack, the first and the second stack each comprising, from the insulating layer to, respectively, a first and a second surface, a barrier layer and a channel layer, the first and the second transistor respectively comprising a first set of electrodes and a second set of electrodes, the first and the second set of electrodes each comprising a source electrode, a drain electrode, and a gate electrode which are arranged so that the first and the second transistor are electrically connected head-to-tail.
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公开(公告)号:US12209889B2
公开(公告)日:2025-01-28
申请号:US18155531
申请日:2023-01-17
Applicant: STMicroelectronics (Rousset) SAS , STMicroelectronics France , STMicroelectronics (Grenoble 2) SAS
Inventor: Laurent Beyly , Olivier Richard , Kenichi Oku
Abstract: An embodiment of the present disclosure relates to a method of detection of a touch contact by a sensor including a first step of comparison of a voltage with a first voltage threshold; and a second step of comparison of the voltage with a second voltage threshold, the second step being implemented if the first voltage threshold has been reached within a duration shorter than a first duration threshold, the second voltage threshold being higher than the first voltage threshold.
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27.
公开(公告)号:US12190123B2
公开(公告)日:2025-01-07
申请号:US17898312
申请日:2022-08-29
Inventor: Frederic Ruelle , Laurent Meunier , Bechir Jabri , Emmanuel Grandin , Nabil Safi , Ghaith Oueslati , Yohann Martiniault , Jerome Caillet
IPC: G06F9/445 , G06F3/0482 , G06F9/4401 , G06F9/451
Abstract: System, method, and circuitry for generating content for a programmable computing device based on user-selected configuration information. A settings registry is generated based on the user's selections. The settings registry and the user selected configuration information is utilized to generate the content, such as code, data, parameters, settings, etc. When the content is provided to the programmable computing device, the content initializes, configures, or controls one or more software and hardware aspects of the programmable computing device, such as boot sequence configurations, internal peripheral configurations, states of the programmable computing device, transitions between states of the programmable computing device, etc., and various combinations thereof.
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公开(公告)号:US12143719B2
公开(公告)日:2024-11-12
申请号:US18470702
申请日:2023-09-20
Applicant: STMicroelectronics France , STMicroelectronics, Inc. , STMicroelectronics (Research & Development) Limited
Inventor: Darin K. Winterton , Donald Baxter , Andrew Hodgson , Gordon Lunn , Olivier Pothier , Kalyan-Kumar Vadlamudi-Reddy
Abstract: A method includes dividing a field of view into a plurality of zones and sampling the field of view to generate a photon count for each zone of the plurality of zones, identifying a focal sector of the field of view and analyzing each zone to select a final focal object from a first prospective focal object and a second prospective focal object.
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公开(公告)号:US12132495B2
公开(公告)日:2024-10-29
申请号:US18069459
申请日:2022-12-21
Inventor: Julien Goulier , Franck Montaudon
IPC: H03M1/12 , H04B5/72 , G06K19/077 , H04B5/00
CPC classification number: H03M1/124 , H04B5/72 , G06K19/07773 , H04B5/00
Abstract: The present disclosure concerns an electronic device connected to an antenna. The electronic device delivers a first amplitude-modulated analog signal of a signal captured by the antenna, the capture signal associated with an electromagnetic field exhibiting intervals at a minimum level. The electronic device includes a first circuit, a second circuit, and a third circuit. The first circuit delivers a second analog signal by rectification and filters the first analog signal. The second circuit delivers a first binary signal based on the demodulation of the second analog signal. The third circuit couples the antenna to a resistor during each pause. The resistance value of the resistor depends on the maximum amplitude of the electromagnetic field before the pause.
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公开(公告)号:US12125894B2
公开(公告)日:2024-10-22
申请号:US18383926
申请日:2023-10-26
Inventor: Alexis Gauthier , Pascal Chevalier
IPC: H01L29/66 , H01L29/06 , H01L29/08 , H01L29/732 , H01L21/265
CPC classification number: H01L29/66272 , H01L29/0649 , H01L29/0821 , H01L29/732 , H01L21/26513
Abstract: A bipolar transistor includes a collector. The collector is formed by: a first portion of the collector which extends under an insulating trench, and a second portion of the collector which crosses through the insulating trench. The first and second portions of the collector are in physical contact.
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