CHARGE PUMP CIRCUIT USING LOW VOLTAGE TRANSISTORS
    21.
    发明申请
    CHARGE PUMP CIRCUIT USING LOW VOLTAGE TRANSISTORS 有权
    充电泵电路使用低电压晶体管

    公开(公告)号:US20120250421A1

    公开(公告)日:2012-10-04

    申请号:US13421322

    申请日:2012-03-15

    IPC分类号: G11C5/14 H05K13/00 G05F3/02

    摘要: The charge pump circuit has a plurality of cascaded charge pump stages, each provided with a first pump capacitor connected to a first internal node and receiving a first high voltage phase signal, and a second pump capacitor connected to a second internal node and receiving a second high voltage phase signal, complementary with respect to the first. A first transfer transistor is coupled between the first internal node and an intermediate node, and a second transfer transistor is coupled between the second internal node and the intermediate node. The first and second high voltage phase signals have a voltage dynamics higher than a maximum voltage sustainable by the first and second transfer transistors. A protection stage is set between the first internal node and second internal node and respectively, the first transfer transistor and second transfer transistor, for protecting the same transfer transistors from overvoltages.

    摘要翻译: 电荷泵电路具有多个级联的电荷泵级,每个级联电荷泵级设置有连接到第一内部节点并接收第一高电压相位信号的第一泵电容器和连接到第二内部节点并接收第二内部节点的第二泵电容器 高电压相位信号,相对于第一相互补充。 第一传输晶体管耦合在第一内部节点和中间节点之间,并且第二传输晶体管耦合在第二内部节点和中间节点之间。 第一和第二高电压相位信号具有比由第一和第二传输晶体管可持续的最大电压高的电压动态特性。 在第一内部节点和第二内部节点之间设置保护级,分别设置第一传输晶体管和第二传输晶体管,用于保护相同的传输晶体管免受过电压。

    Fast writing non-volatile memory with main and auxiliary memory areas
    22.
    发明授权
    Fast writing non-volatile memory with main and auxiliary memory areas 有权
    快速写入具有主和辅助存储区域的非易失性存储器

    公开(公告)号:US08050106B2

    公开(公告)日:2011-11-01

    申请号:US12113709

    申请日:2008-05-01

    IPC分类号: G11C16/04

    CPC分类号: G11C16/225 G11C16/102

    摘要: A method writes data in a non-volatile memory comprising memory cells that are erased before being written. The method comprises the steps of providing a main non-volatile memory area comprising target pages, providing an auxiliary non-volatile memory area comprising auxiliary pages, providing a look-up table to associate to an address of invalid target page an address of valid auxiliary page, and, in response to a command for writing a piece of data in a target page writing the piece of data as well as the address of the target page in a first erased auxiliary page, invalidating the target page, and updating the look-up table.

    摘要翻译: 一种方法是将数据写入非易失性存储器,其中包括在写入之前被擦除的存储器单元。 该方法包括以下步骤:提供包括目标页面的主非易失性存储器区域,提供包括辅助页面的辅助非易失性存储器区域,提供查找表以与无效目标页面的地址相关联的有效辅助地址 页面,并且响应于在目标页面中写入一条数据的命令以及在第一擦除的辅助页面中的目标页面的地址,使目标页面无效,并且更新查找页面, 桌子。

    Low-consumption regulator for a charge pump voltage generator and related system and method
    23.
    发明授权
    Low-consumption regulator for a charge pump voltage generator and related system and method 有权
    低功耗稳压器用于电荷泵电压发生器及相关系统及方法

    公开(公告)号:US07403405B2

    公开(公告)日:2008-07-22

    申请号:US10877063

    申请日:2004-06-24

    IPC分类号: H02M3/18

    CPC分类号: H02M3/073

    摘要: A regulator circuit for a charge pump voltage generator includes a voltage comparator circuit that performs a voltage comparison between a charge pump output voltage and a reference voltage. A circuit responsive to the voltage comparator circuit conditions a charge pump clocking to the result of the voltage comparison. The voltage comparator circuit includes a sampling circuit for sampling the charge pump output voltage at a sampling rate. A sampling rate control circuit is responsive to the voltage comparisons for controlling the sampling rate according to the result of the voltage comparison.

    摘要翻译: 用于电荷泵电压发生器的调节器电路包括执行电荷泵输出电压和参考电压之间的电压比较的电压比较器电路。 响应于电压比较器电路的电路将电荷泵时钟调节到电压比较的结果。 电压比较器电路包括用于以采样率对电荷泵输出电压进行采样的采样电路。 采样率控制电路响应于电压比较,以根据电压比较的结果控制采样率。

    Variable stage charge pump
    24.
    发明授权
    Variable stage charge pump 有权
    可变级电荷泵

    公开(公告)号:US06927441B2

    公开(公告)日:2005-08-09

    申请号:US10050427

    申请日:2002-01-15

    CPC分类号: H02M3/07 H02M2003/077

    摘要: A variable charge pump contains several individual simple charge pumps, each with a pumping capacitor and a switching mechanism. Additionally, a switching network is coupled to the individual charge pumps so that the different lines in the charge pump can be connected together in a serial mode or parallel mode (or mixed serial and parallel modes) to match the needs of the output load. The switching network is easily changed to provide the necessary driving capability as the needs of the output load changes.

    摘要翻译: 可变电荷泵包含几个单独的简单电荷泵,每个具有泵浦电容器和开关机构。 此外,开关网络耦合到各个电荷泵,使得电荷泵中的不同线路可以以串行模式或并行模式(或混合串行和并行模式)连接在一起以匹配输出负载的需要。 随着输出负载的变化需要,开关网络容易改变以提供必要的驱动能力。

    Method for biasing an EEPROM non-volatile memory array and corresponding EEPROM non-volatile memory device
    25.
    发明授权
    Method for biasing an EEPROM non-volatile memory array and corresponding EEPROM non-volatile memory device 有权
    用于偏置EEPROM非易失性存储器阵列和相应的EEPROM非易失性存储器件的方法

    公开(公告)号:US08376237B2

    公开(公告)日:2013-02-19

    申请号:US12885028

    申请日:2010-09-17

    IPC分类号: G06K19/06

    摘要: Described herein is a method for biasing an EEPROM array formed by memory cells arranged in rows and columns, each operatively coupled to a first switch and to a second switch and having a first current-conduction terminal selectively connectable to a bitline through the first switch and a control terminal selectively connectable to a gate-control line through the second switch, wherein associated to each row are a first wordline and a second wordline, connected to the control terminals of the first switches and, respectively, of the second switches operatively coupled to the memory cells of the same row. The method envisages selecting at least one memory cell for a given memory operation, biasing the first wordline and the second wordline of the row associated thereto, and in particular biasing the first and second wordlines with voltages different from one another and having values that are higher than an internal supply voltage and are a function of the given memory operation.

    摘要翻译: 这里描述了一种用于偏置由排列成行和列的存储器单元形成的EEPROM阵列的方法,每个可操作地耦合到第一开关和第二开关,并且具有通过第一开关选择性地连接到位线的第一导通端子, 选择性地可连接到通过第二开关的栅极控制线的控制终端,其中与每一行相关联的是分别连接到第一开关的控制端的第一字线和第二字线,以及分别操作地耦合到 同一行的存储单元。 该方法设想为给定的存储器操作选择至少一个存储器单元,偏置与其相关联的行的第一字线和第二字线,并且特别是以彼此不同的电压偏置第一和第二字线并且具有更高的值 而不是内部电源电压,并且是给定存储器操作的函数。

    Electronic circuit for generating low voltage and high frequency phases in a charge pump
    26.
    发明授权
    Electronic circuit for generating low voltage and high frequency phases in a charge pump 有权
    用于在电荷泵中产生低电压和高频相的电子电路

    公开(公告)号:US08063693B2

    公开(公告)日:2011-11-22

    申请号:US12559967

    申请日:2009-09-15

    IPC分类号: G05F1/10 G05F3/02

    CPC分类号: H02M3/073 H02M2003/077

    摘要: A charge pump latch circuit is provided that includes at least one first and at least one second charge pump stage interconnected by an intermediate circuit node, and a stabilization stage connected to the intermediate circuit node and to control terminals of transistors of the first and second charge pump stages. The stabilization stage includes at least one first pair and at least one second pair of first and second enable terminals receiving suitable and distinct phase signals that ensure the turn-off of the stabilization stage during overlapping periods of the phase signals. Also provided is a method for using a stabilization stage to drive transistors in first and second charge pump stages that are interconnected by an intermediate circuit node.

    摘要翻译: 提供一种电荷泵锁存电路,其包括由中间电路节点互连的至少一个第一和至少一个第二电荷泵级,以及连接到中间电路节点的稳定级,并且控制第一和第二电荷的晶体管的端子 泵级。 稳定级包括至少一个第一对和至少一个第二对第一和第二使能端,其接收合适且不同的相位信号,以确保在相位信号的重叠周期期间稳定级的关断。 还提供了一种使用稳定级来驱动由中间电路节点互连的第一和第二电荷泵级中的晶体管的方法。

    LATCH CHARGE PUMP WITH EQUALIZATION CIRCUIT
    28.
    发明申请
    LATCH CHARGE PUMP WITH EQUALIZATION CIRCUIT 有权
    具有均衡电路的锁扣充电泵

    公开(公告)号:US20110068857A1

    公开(公告)日:2011-03-24

    申请号:US12882981

    申请日:2010-09-15

    IPC分类号: G05F3/02

    CPC分类号: H02M3/073 H02M2003/077

    摘要: A charge pump including first and a second charge-pump stages electrically coupled, four pump capacitors connected between two enable terminals and four internal nodes, two pump transistors connected to the pump capacitors and to the internal nodes, and having respective control terminals, two biasing capacitors, connected between the control terminals and the enable terminals, and an equalization circuit connected between the control terminals and structured to limit the voltage between the control terminals within a first range of values.

    摘要翻译: 电荷泵包括第一和第二电荷泵级电耦合,四个泵电容器连接在两个使能端子和四个内部节点之间,两个泵浦晶体管连接到泵电容器和内部节点,并具有相应的控制端子,两个偏置 连接在控制端子和使能端子之间的电容器,以及连接在控制端子之间并被构造成将控制端子之间的电压限制在第一值范围内的均衡电路。

    CONTROL INTEGRATED CIRCUIT FOR A CHARGE PUMP
    29.
    发明申请
    CONTROL INTEGRATED CIRCUIT FOR A CHARGE PUMP 有权
    充电泵控制集成电路

    公开(公告)号:US20080007321A1

    公开(公告)日:2008-01-10

    申请号:US11771157

    申请日:2007-06-29

    IPC分类号: G05F1/10

    CPC分类号: G11C5/145 G11C16/12

    摘要: An integrated control circuit for a charge pump includes a first device for regulating the output voltage of the charge pump and a second device for increasing the output voltage from the charge pump with a set ramp. The integrated circuit includes means for activating said first device and providing it with a first value of a supply signal in a first period of time and for activating the second device and providing it with a second value of the supply signal that is greater than the first value in a second period of time after the first in such a way that the output voltage of the charge pump ascends a ramp from a first value to a second value that is greater than the first value, the second value being fixed by reactivation of the first device.

    摘要翻译: 用于电荷泵的集成控制电路包括用于调节电荷泵的输出电压的第一装置和用于通过设定斜坡增加来自电荷泵的输出电压的第二装置。 集成电路包括用于激活所述第一设备并且在第一时间段内向其提供电源信号的第一值并且用于激活第二设备并且向其提供大于第一设备的第二电源信号的第二值的装置 在第一次之后的第二时间段内的值以使得电荷泵的输出电压从第一值升高到大于第一值的第二值的斜坡,第二值通过重新激活固定 第一个装置

    Non-volatile memory architecture and method, in particular of the EEPROM type
    30.
    发明申请
    Non-volatile memory architecture and method, in particular of the EEPROM type 有权
    非易失性存储器架构和方法,特别是EEPROM类型

    公开(公告)号:US20070247919A1

    公开(公告)日:2007-10-25

    申请号:US11701165

    申请日:2007-01-31

    IPC分类号: G11C16/06

    CPC分类号: G11C16/0433

    摘要: A memory architecture includes at least one matrix of memory cells of the EEPROM type organized in rows or word lines and columns or bit lines. Each memory cell includes a floating gate cell transistor and a selection transistor and is connected to a source line shared by the matrix. The memory cells are organized in words, all the memory cells belonging to a same word being driven by a byte switch, which is, in turn, connected to at least one control gate line. The memory cells further have accessible substrate terminals connected to a first additional line.

    摘要翻译: 存储器架构包括以行或字线和列或位线组织的EEPROM类型的至少一个存储器单元矩阵。 每个存储单元包括浮栅单元晶体管和选择晶体管,并连接到由矩阵共享的源极线。 存储器单元以字为单位,属于相同字的所有存储单元由字节开关驱动,该字节开关依次连接至至少一个控制栅极线。 存储单元还具有连接到第一附加线路的可访问基板端子。