公开(公告)号：US10063155B2

公开(公告)日：2018-08-28

申请号：US15148870

申请日：2016-05-06

Applicant: Apple Inc.

Inventor： Behzad Mohtashemi ,  Asif Hussain ,  Manisha P. Pandya ,  Mohammad J. Navabi-Shirazi ,  Nileshbhai J. Shah

IPC: H02M3/335 ,  H02M1/32 ,  H02M1/00

CPC classification number: H02M3/33523 ,  H02M1/32 ,  H02M2001/0009

Abstract: Various systems and methods are disclosed herein, which provide isolated systems with an auxiliary, multi-signal digital feedback loop for reporting a plurality of different potential fault conditions in an output system (e.g., output short circuit, output over-voltage, output under-voltage, output over temperature, etc.) to a Primary Controller in an input system. The signals may be sent according to any desired standardized (or proprietary) data transmission protocols. Use of a digital feedback loop allows the signals to be passed to the Primary Controller more quickly than is allowed by traditional analog feedback paths—and while using only a single optocoupler device for the transmission of all fault conditions. The techniques disclosed herein are applicable to any number of isolated systems that supply power to electronic systems such as: digital cameras, mobile phones, watches, personal data assistants (PDAs), portable music players, monitors, as well as desktop, laptop, and tablet computers.

公开(公告)号：US20170126133A1

公开(公告)日：2017-05-04

申请号：US15064395

申请日：2016-03-08

Applicant: Apple Inc.

Inventor： Zaohong Yang ,  Behzad Mohtashemi

IPC: H02M3/335

CPC classification number: H02M3/33507 ,  H02M3/33576 ,  H02M3/33592 ,  H02M2001/0067 ,  H02M2001/007 ,  H02M2001/0074 ,  H02M2001/0077

Abstract: This disclosure relates to power converters that are capable of providing smooth transitions between multiple output voltage levels. The converter's output may need to be changed from, e.g., 5V to 12V, 15V, or 20V—based on the charging device's request. By using improved power converter designs comprising both a flyback converter circuit and variable-frequency buck converter circuit that may each be selectively coupled to an output load, a more smooth, e.g., monotonous, transition between output voltage levels may be achieved. In particular, by varying the switching frequency of the buck converter in a controlled way, the output voltage of the power converter may rise monotonically during the transition between output voltage levels. According to some embodiments, once the output of the buck converter has reached its maximum value, the buck converter may be disabled, and the flyback converter may be enabled to begin supplying the output voltage to the load.

公开(公告)号：US09345083B2

公开(公告)日：2016-05-17

申请号：US14503037

申请日：2014-09-30

Applicant: Apple Inc.

Inventor： Asif Hussain ,  Behzad Mohtashemi ,  Mohammad J. Navabi-Shirazi ,  Jingdong Chen ,  Manisha P. Pandya

IPC: H05B37/02 ,  H05B33/08 ,  G09G3/34

CPC classification number: H05B33/0815 ,  G09G3/3406 ,  G09G3/342 ,  G09G2310/08 ,  G09G2320/0233 ,  G09G2320/064 ,  Y02B20/346

Abstract: The embodiments discussed herein relate to systems, methods, and apparatus for executing a pulse frequency modulation (PFM) mode of a boost converter in order to ensure that a switching frequency of the boost converter is a above an audible frequency threshold. In this way, a user operating a display device that is controlled by the boost converter will not be disturbed by audible noises generated at the display device. The PFM mode enforces an audible frequency threshold by using control circuitry designed to increase or decrease the frequency of a pulse signal depending on how the frequency of the pulse signal changes over time. The control circuitry can apply an additional load to the boost converter in order to increase the frequency of the pulse signal when the frequency is approaching the audible frequency threshold.

Abstract translation: 本文讨论的实施例涉及用于执行升压转换器的脉冲频率调制（PFM）模式的系统，方法和装置，以便确保升压转换器的开关频率高于可听频率阈值。 以这种方式，操作由升压转换器控制的显示装置的用户不会被在显示装置处产生的可听见的噪声所扰乱。 PFM模式通过使用设计用于根据脉冲信号的频率如何随时间而变化的脉冲信号的频率而设计的控制电路来实施可听频率阈值。 控制电路可以向升压转换器施加额外的负载，以便在频率接近可听频率阈值时增加脉冲信号的频率。