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公开(公告)号：US20230178046A1
公开(公告)日：2023-06-08
申请号：US17921082
申请日：2021-05-12
Applicant: BOE Technology Group Co., Ltd.
Inventor： Guangliang SHANG , Tian DONG , Shuo HUANG , Can ZHENG
IPC: G09G3/36
CPC classification number: G09G3/3674 , G09G2310/0286
Abstract: A driving method and device for a shift register. In a data refreshing phase, loading an input signal having a pulse level to an input signal end, loading a control clock pulse signal to a control clock signal end, loading a noise reduction clock pulse signal to a noise reduction clock signal end, controlling a cascade signal end of the shift register to output a cascade signal having a pulse level, and controlling a drive signal end of the shift register to output a drive signal having a pulse level; in a data holding phase, loading a fixed voltage signal to the input signal end, loading a first set signal to the control clock signal end, loading a second set signal to the noise reduction clock signal end, controlling the cascade signal end to output a fixed voltage signal having a second level.
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公开(公告)号：US20230162684A1
公开(公告)日：2023-05-25
申请号：US17610043
申请日：2021-01-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Jiangnan LU , Can ZHENG
IPC: G09G3/3266 , G11C19/28 , H10K59/131
CPC classification number: G09G3/3266 , G11C19/28 , H10K59/131 , G09G2300/0852 , G09G2310/0286
Abstract: A display substrate, a manufacturing method thereof and a display device are provided. The display substrate includes a base substrate, and a shift register unit, a first clock signal line and a second clock signal line which are on the peripheral region of the base substrate; the first clock signal line and the second clock signal line extend along a first direction; an active layer of the first control transistor, an active layer of the second control transistor, and an active layer of the third control transistor respectively extend along a second direction, and the active layer of the first control transistor, the active layer of the second control transistor, and the active layer of the third control transistor are on a side of the first clock signal line and the second clock signal line close to the display region, and are arranged side by side in the first direction.
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公开(公告)号：US20220376024A1
公开(公告)日：2022-11-24
申请号：US17763198
申请日：2021-05-31
Applicant: BOE Technology Group Co., Ltd.
Inventor： Can ZHENG , Li WANG , Hao ZHANG , Yipeng CHEN , Ke LIU
IPC: H01L27/32
Abstract: A display substrate and a manufacturing method therefor, and a display apparatus. The display substrate includes a base substrate, a second power line, a data signal line and a plurality of sub-pixels, wherein at least one sub-pixel includes a pixel driving circuit and a light emitting device connected to the pixel driving circuit, the pixel driving circuit is connected to the data signal line and the light emitting device is connected to the second power line; a semiconductor layer and a plurality of conducting layers, which are disposed at one side of the semiconductor layer away from the base substrate, are disposed on the base substrate, a first electrode is arranged on at least one conducting layer.
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公开(公告)号：US20220336500A1
公开(公告)日：2022-10-20
申请号：US17760988
申请日：2021-05-18
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Libin LIU , Can ZHENG , Shiming SHI
Abstract: Embodiments of the present disclosure provide a display substrate, a touch display panel and a display panel. The display substrate has a display region and a pin region on a side of the display region. The display substrate includes: a base substrate;
and at least one first signal line and at least one second signal line both on a side of the base substrate and both extending to the display region from the pin region. The display substrate further includes a DC conductive structure connected to a constant DC voltage. The DC conductive structure is between the at least one first signal line and the at least one second signal line. Each of the at least one first signal line and the at least one second signal line is spaced apart from the DC conductive structure.-
公开(公告)号：US20200265877A1
公开(公告)日：2020-08-20
申请号：US16645697
申请日：2019-08-20
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Can ZHENG
Abstract: Shift register includes input sub-circuit coupling input terminal to first node responsive to signal of first clock terminal in input stage, control sub-circuit transmitting signal of second clock terminal to intermediate output terminal according to level at first node and controlling potential of third node according to potential of intermediate output terminal and signal of third clock terminal in input, output and reset stages, pull-up sub-circuit coupling second level terminal to final output terminal responsive to potential of intermediate output terminal in output stage, first voltage stabilization sub-circuit stabilizing voltage between final output terminal and third node responsive to signal of next-stage node connection terminal, pull-down transistor having gate electrode coupled to third node, first electrode coupled to first level terminal, and second electrode coupled to final output terminal. First voltage stabilization sub-circuit lowers potential of third node to level lower than signal of first level terminal in reset stage.
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Patent Agency Ranking
公开(公告)号：US20200184873A1
公开(公告)日：2020-06-11
申请号：US16622099
申请日：2019-01-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Can ZHENG
Abstract: A shift register and driving method thereof, a gate driving circuit and a display device are provided. The shift register includes a first input unit, a second input unit, a pull-up control unit, a pull-down control unit, an output control unit and an output reset unit, wherein the first input unit, the second input unit, the pull-up control unit, the pull-down control unit and the output control unit are coupled to a first node, and the pull-up control unit, the pull-down control unit and the output reset unit are coupled to a second node.
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公开(公告)号：US20180174521A1
公开(公告)日：2018-06-21
申请号：US15300930
申请日：2015-09-24
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: G09G3/3266 , G09G3/36 , G09G3/34 , G11C19/28
CPC classification number: G09G3/3266 , G09G3/20 , G09G3/3674 , G09G2310/0286 , G09G2310/061 , G09G2310/08 , G11C19/184 , G11C19/28
Abstract: The present disclosure provides a shift register unit, its driving method, a gate driver circuit and a display device. The shift register unit includes a first output module, a second output module, an input module and a control module. The first output module is connected to a first signal end, a first node and an output end. The second output module is connected to the output end, a second node and a second signal end. The control module is connected to the first node, the second node, the first signal end, the second signal end, a first clock signal end and a second clock signal end. The input module is connected to an input end, the second node and the second clock signal end.
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28.发明申请GOA CIRCUIT AND A DRIVING METHOD THEREOF, A DISPLAY PANEL AND A DISPLAY APPARATUS 审中-公开GOA电路及其驱动方法，显示面板和显示装置公开(公告)号：US20160372078A1
公开(公告)日：2016-12-22
申请号：US14906496
申请日：2015-06-02
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Song SONG , Kayzuyoshi NAGAYAMA , Can ZHENG
CPC classification number: G09G5/003 , G09G3/20 , G09G5/14 , G09G2300/0408 , G09G2310/0267 , G09G2310/0286 , G09G2330/021 , G09G2380/02
Abstract: The present invention discloses a GOA circuit and a driving method thereof, a display panel and a display apparatus. The GOA circuit comprises a plurality of GOA cell groups arranged to be interconnected in series, each of the GOA cell groups comprising at least one stage of GOA cells arranged to be interconnected in series; the GOA circuit further comprises a control unit; the control unit is connected with a first stage of GOA cell in each of the GOA cell groups, for inputting a frame start signal to the first stage of GOA cell in a first GOA cell group in the display region. The GOA circuit is capable of effectively reducing the power consumption of the display product.
Abstract translation: 本发明公开了一种GOA电路及其驱动方法，显示面板和显示装置。 GOA电路包括被布置为串联互连的多个GOA单元组，每个GOA单元组包括至少一级的GOA单元，其被布置为串联互连; GOA电路还包括控制单元; 控制单元与GOA单元组中的每一个中的GOA单元的第一级连接，用于将帧起始信号输入到显示区域中的第一GOA单元组中的GOA单元的第一级。 GOA电路能够有效降低显示产品的功耗。
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公开(公告)号：US20240423046A1
公开(公告)日：2024-12-19
申请号：US18818535
申请日：2024-08-28
Applicant: BOE Technology Group Co., Ltd.
Inventor： Jiangnan LU , Guangliang SHANG , Can ZHENG , Yu FENG , Libin LIU , Jie ZHANG , Mei LI
IPC: H10K59/131 , G09G3/3208 , H10K59/121
Abstract: Provided is a display substrate, the display substrate is provided with a display area and a peripheral area around the display area, and includes a source/drain layer and an anode layer, wherein in the peripheral area, the source/drain layer includes pairs of first signal lines configured to drive circuits, and the pairs of first signal lines include clock signal lines and gate drive lines; and the anode layer includes a common power line provided with vent holes; and overlapping areas between two first signal lines in any pair of the first signal lines and a projection pattern of the vent hole are equal, the projection pattern of the vent hole being a pattern of an orthographic projection of the vent hole in the common power line onto the source/drain layer. A display panel and a display device are also provided.
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公开(公告)号：US20230363220A1
公开(公告)日：2023-11-09
申请号：US18221420
申请日：2023-07-13
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Hongwei TIAN , Yanan NIU , Zheng LIU , Liangjian LI , Dong LI , Meng ZHAO , Long HAN , Can ZHENG
IPC: H10K59/131 , G09G3/3266 , G09G3/3275 , H10K59/124 , H10K59/121 , H10K77/10
CPC classification number: H10K59/131 , G09G3/3266 , G09G3/3275 , H10K59/124 , H10K59/1213 , H10K77/111 , H01L27/1218
Abstract: A display panel and a display device are provided. The display panel has a display area. The display panel includes: a base substrate; a driving circuit and at least one signal line on the base substrate; and at least one insulating layer between the driving circuit and the at least one signal line. The driving circuit is disposed in a periphery of the display area; and an orthogonal projection of at least one of the signal lines on the base substrate has an overlapping area with an orthogonal projection of the driving circuit on the base substrate.
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