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公开(公告)号：US20210272492A1
公开(公告)日：2021-09-02
申请号：US16077992
申请日：2018-02-22
Inventor： Feng LI , Baoqiang WANG , Qiujie SU
IPC: G09G3/20
Abstract: A start signal generation circuit, a driving method and a display device are provided. The start signal generation circuit includes: a pull-down node control sub-circuit; a pull-up control node control sub-circuit, configured to control a potential of the pull-up control node under the control of voltage signals from a first clock signal input terminal, a second clock signal input terminal, and the 2nth clock signal input terminal; a pull-up node control sub-circuit; a storage sub-circuit, connected between the pull-up node PU and a start signal output terminal; and a start signal output sub-circuit, where n is an integer larger than 1, and smaller than or equal to N, N is an integer larger than 1.
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公开(公告)号：US20250157433A1
公开(公告)日：2025-05-15
申请号：US19024259
申请日：2025-01-16
Inventor： Yanping LIAO , Yingmeng MIAO , Seungmin LEE , Xibin SHAO , Shulin YAO , Yinlong ZHANG , Qiujie SU , Cong WANG , Dongchuan CHEN , Jiantao LIU
IPC: G09G3/36 , G09G3/3266 , G11C19/28
Abstract: A display panel, a driving method for the display panel and a display device. The display panel includes a gate driving circuit, the gate driving circuit includes shift registers of a plurality of stages arranged in sequence, the shift registers of the plurality of stages arranged in sequence are combined into N groups of gate driving sub-circuits, and shift registers in the N groups of gate driving sub-circuits are cascaded, respectively; an m-th group of gate driving sub-circuits in the N groups of gate driving sub-circuits includes a shift register of an m-th stage and a shift register of an (m+L*N)-th stage that are cascaded, where m is an integer that is greater than or equal to 1 and less than or equal to N.
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公开(公告)号：US20240339089A1
公开(公告)日：2024-10-10
申请号：US18580697
申请日：2022-07-01
Inventor： Yanping LIAO , Dong LIU , Yingmeng MIAO , Dongchuan CHEN , Qiujie SU , Yinlong ZHANG , Shulin YAO , Xibin SHAO , Seungmin LEE , Xiaofeng YIN
CPC classification number: G09G3/3677 , G06F3/04166 , G09G2300/0408 , G09G2310/0286 , G09G2320/0233 , G09G2354/00
Abstract: The present disclosure provides a display panel driving method, a display panel and a display device, the method comprising: comprising alternately configure display time periods and touch time periods in one time frame, at least one touch time period being configured, and at least two display time periods being configured; sequentially scanning in each display time period a portion of gate lines in a display panel; and pausing in each touch time period the scanning of all gate lines, and performing touch recognition, wherein in a display time period adjacent to a touch time period, level compensation is performed on a gate line to be compensated, and the gate line to be compensated is at least one gate line that starts to scan in the display time period adjacent to the touch time period.
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Patent Agency Ranking
公开(公告)号：US20240241410A1
公开(公告)日：2024-07-18
申请号：US18620022
申请日：2024-03-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: G02F1/1345 , G02F1/1333 , G02F1/1335 , G02F1/1343 , G02F1/1347 , G06F3/041 , G06F3/044 , H05K1/02 , H05K1/14
CPC classification number: G02F1/13452 , G02F1/13338 , G02F1/133512 , G02F1/13439 , G02F1/1347 , G06F3/0412 , G06F3/0446 , H05K1/028 , H05K1/147 , G02F2203/48 , H05K2201/10136
Abstract: A display module is provided. The display module includes: a display panel, a light control panel, at least one first circuit board for the display panel, and at least one second circuit board for the light control panel. The display panel and the light control panel) are stacked, the display panel is on a light-emitting side of the light control panel, a light-emitting surface of the display panel is on a first surface, and at least part of an orthographic projection of any one of the at least one first circuit board on the first surface does not overlap with an orthographic projection of the at least one second circuit board on the first surface in a direction perpendicular to the first surface.
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公开(公告)号：US20230176667A1
公开(公告)日：2023-06-08
申请号：US17310984
申请日：2020-11-30
Inventor： Qiujie SU , Yanping LIAO , Yingmeng MIAO , Chongyang ZHAO , Bo HU , Xiaofeng YIN
IPC: G06F3/041 , G02F1/1333 , G02F1/1362 , G02F1/1343 , H01L27/12
CPC classification number: G06F3/0412 , G02F1/13338 , G02F1/136286 , G02F1/136204 , G02F1/134309 , H01L27/124 , G06F3/044
Abstract: An array substrate and a touch display device are provided. In the array substrate, a first control unit and a second control unit are arranged opposite to each other in a first direction. A plurality of touch sensor blocks includes a first group of electrode blocks and a second group of electrode blocks arranged in the first direction, and a plurality of touch signal lines includes a first group of touch signal lines and a second group of touch signal lines arranged in the first direction. The touch signal lines in the first group of touch signal lines are coupled to the touch sensor blocks in the first group of electrode blocks respectively; and the touch signal lines in the second group of touch signal lines are coupled to the touch sensor blocks in the second group of electrode blocks respectively.
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公开(公告)号：US20220383830A1
公开(公告)日：2022-12-01
申请号：US17773531
申请日：2021-05-20
Inventor： Qiujie SU
IPC: G09G3/36 , G02F1/1362 , G02F1/1368 , G02F1/1343 , G02F1/1335 , G02F1/136 , H01L27/12
Abstract: A display substrate includes: a first base substrate (20), and gate lines (4) and data lines (5) on the first base substrate (20). The gate lines (4) extend in a first direction (X), and the data lines (5) extend in a second direction (Y). The gate lines (4) and the data lines (5) define pixel units, each of which includes a thin film transistor (7), a pixel electrode (8) and a common electrode (9). At least some of the pixel units are respectively configured with conductive bridge lines (10) provided in the same layer as the pixel electrode (8). In a pixel unit configured with the conductive bridge line (10), a first hollowed-out structure (13) and a second hollowed-out structure (14) are provided on opposite sides of the pixel electrode (8) in the first direction, to weaken or even eliminate mura (e.g., nonuniformity in brightness or color).
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公开(公告)号：US20220350189A1
公开(公告)日：2022-11-03
申请号：US17427616
申请日：2020-10-30
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
IPC: G02F1/1345 , H05K1/02 , H05K1/14 , G02F1/1347 , G02F1/1335 , G02F1/1333 , G02F1/1343 , G06F3/041 , G06F3/044
Abstract: A display module is provided. The display module includes: a display panel, a light control panel, at least one first circuit board for the display panel, and at least one second circuit board for the light control panel. The display panel and the light control panel are stacked, the display panel is on a light-emitting side of the light control panel, a light-emitting surface of the display panel is on a first surface, and at least part of an orthographic projection of any one of the at least one first circuit board on the first surface does not overlap with an orthographic projection of the at least one second circuit board on the first surface in a direction perpendicular to the first surface.
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28.发明申请公开(公告)号：US20190189233A1
公开(公告)日：2019-06-20
申请号：US16304738
申请日：2018-02-08
Inventor： Qiujie SU
CPC classification number: G11C19/287 , G09G3/20 , G09G2300/0408 , G09G2300/0426 , G09G2310/0286 , G09G2310/08 , G11C19/28
Abstract: There are disclosed in the present disclosure a shift register unit and a driving method thereof, a gate driving circuit, an array substrate and a display apparatus. The shift register unit includes: an input sub-circuit for receiving an input signal from an input terminal, outputting the input signal to the pull-up node, and outputting a pull-up signal through the pull-up node; a first output sub-circuit for receiving the pull-up signal and a first clock signal, and outputting a first output signal from a first output signal terminal according to the pull-up signal and the first clock signal; a second output sub-circuit for receiving the pull-up signal and a second clock signal, and outputting a second output signal from a second output signal terminal according to the pull-up signal and the second clock signal; a storage sub-circuit for storing the pull-up signal.
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