CMOS VCO WITH IMPLICIT COMMON-MODE RESONANCE
    21.
    发明申请
    CMOS VCO WITH IMPLICIT COMMON-MODE RESONANCE 有权
    具有隐含共模共振的CMOS VCO

    公开(公告)号:US20160373058A1

    公开(公告)日:2016-12-22

    申请号:US14822809

    申请日:2015-08-10

    Abstract: A circuit for an oscillator with common-mode resonance includes a first oscillator circuit and a second oscillator circuit coupled to the first oscillator circuit. Each of the first oscillator circuit or the second oscillator circuit includes a tank circuit, a cross-coupled transistor pair, and one or more capacitors. The tank circuit is formed by coupling a first inductor with a pair of first capacitors. The cross-coupled transistor pair is coupled to the tank circuit, and one or more second capacitors are coupled to the tank circuit and the cross-coupled transistor pair. Each of the first oscillator circuit or the second oscillator circuit allows tuning of a respective common mode (CM) resonance frequency (Fcm) to be at twice a respective differential resonance frequency (FD).DM——ITS 62683970-1.093986 0453

    Abstract translation: DM - ITS 62683970-1.093986 0453

    Radio receiver co-existence
    22.
    发明授权
    Radio receiver co-existence 有权
    无线电接收机共存

    公开(公告)号:US09525447B1

    公开(公告)日:2016-12-20

    申请号:US14858826

    申请日:2015-09-18

    CPC classification number: H03D7/1466 H03D7/1441 H03D7/1458 H03D7/1491 H04B1/16

    Abstract: Because of associated disadvantages of narrow-band off-chip radio-frequency (RF) filtering, a mixer-first receiver front-end designed to tolerate blockers with reduced gain compression and noise factor degradation is disclosed. The mixer-first receiver front-end includes two separate down-conversion paths that help to reduce added noise and voltage gain prior to baseband filtering, which are critical factors in eliminating narrow-band off-chip RF filtering. The mixer-first receiver front-end can be used to support down-conversion of multiple different communication signals (e.g., cellular, WLAN, and WPAN communication) with different center frequencies. In addition, where it is not possible to use a single, mixer-first receiver front-end to down-convert two different communication signals with potentially different center frequencies due to the need for both communication signals to be down-converted simultaneously, two mixer-first receiver front-ends can be efficiently used by sharing an antenna via a common RF port.

    Abstract translation: 由于窄带片外射频(RF)滤波的相关缺点,公开了一种设计用于容忍具有减小的增益压缩和噪声因子降级的阻塞器的混频器优先接收机前端。 混频器第一接收机前端包括两个单独的下变频路径,有助于在基带滤波之前减少额外的噪声和电压增益,这是消除窄带片外RF滤波的关键因素。 混频器第一接收机前端可用于支持具有不同中心频率的多个不同通信信号(例如,蜂窝,WLAN和WPAN通信)的下转换。 另外,由于不需要两个通信信号同时进行下变频,所以在不可能使用单个混频器接收机前端来对具有潜在不同中心频率的两个不同通信信号进行下变频的情况下, 通过共用RF端口共享天线,可以有效地使用第一个接收机前端。

    Receiver architecture with complementary passive mixer and complementary common-gate tia with low-noise gain control
    23.
    发明授权
    Receiver architecture with complementary passive mixer and complementary common-gate tia with low-noise gain control 有权
    具有互补无源混频器和具有低噪声增益控制的互补共栅极的接收器架构

    公开(公告)号:US09160388B2

    公开(公告)日:2015-10-13

    申请号:US13719076

    申请日:2012-12-18

    Abstract: A circuit for a low-power and blocker-tolerant mixer-amplifier stage may include a complementary mixer formed by transmission gates having complementary structures. The complementary mixer may be configured to receive one or more radio-frequency (RF) signals and to convert the one or more RF signals to intermediate frequency (IF) current signals. A complementary TIA may be coupled to the complementary mixer and may be configured to receive the IF current signals and provide IF voltage signals. The complementary TIA may be formed by coupling an NMOS-TIA and a PMOS-TIA to a common load. A first portion of the complementary mixer may be coupled to the NMOS-TIA and a second portion of the complementary mixer may be coupled to the PMOS-TIA.

    Abstract translation: 用于低功率和容阻型混频器 - 放大器级的电路可以包括由具有互补结构的传输门形成的互补混频器。 互补混频器可以被配置为接收一个或多个射频(RF)信号并将一个或多个RF信号转换成中频(IF)电流信号。 互补TIA可以耦合到互补混频器,并且可以被配置为接收IF电流信号并提供IF电压信号。 可以通过将NMOS-TIA和PMOS-TIA耦合到公共负载来形成互补TIA。 互补混频器的第一部分可以耦合到NMOS-TIA,并且互补混频器的第二部分可以耦合到PMOS-TIA。

    Single differential-inductor VCO with implicit common-mode resonance
    24.
    发明授权
    Single differential-inductor VCO with implicit common-mode resonance 有权
    具有隐式共模谐振的单差分电感VCO

    公开(公告)号:US09008601B2

    公开(公告)日:2015-04-14

    申请号:US13969381

    申请日:2013-08-16

    Abstract: A circuit for a single differential-inductor oscillator with common-mode resonance may include a tank circuit formed by coupling a first inductor with a pair of first capacitors; a cross-coupled transistor pair coupled to the tank circuit; and one or more second capacitors coupled to the tank circuit and the cross-coupled transistors. The single differential-inductor oscillator may be configured such that a common mode (CM) resonance frequency (FCM) associated with the single differential-inductor oscillator is at twice a differential resonance frequency (FD) associated with the single differential-inductor oscillator.

    Abstract translation: 用于具有共模谐振的单个差分电感器振荡器的电路可以包括通过将第一电感器与一对第一电容器耦合而形成的振荡电路; 耦合到所述槽电路的交叉耦合晶体管对; 以及一个或多个第二电容器,其耦合到储能电路和交叉耦合的晶体管。 单个差分电感器振荡器可以被配置为使得与单个差分电感器振荡器相关联的共模(CM)谐振频率(FC)为与单个差分电感器振荡器相关联的差分谐振频率(FD)的两倍。

    SAW-less receiver including an if frequency translated BPF
    25.
    发明授权
    SAW-less receiver including an if frequency translated BPF 有权
    无SAW接收机,包括频率转换BPF

    公开(公告)号:US09002295B2

    公开(公告)日:2015-04-07

    申请号:US14028161

    申请日:2013-09-16

    CPC classification number: H04L27/06 H04L27/34

    Abstract: A SAW-less receiver includes an FEM interface module, an RF to IF receiver section, and a receiver IF to baseband section. The RF to IF receiver section includes a mixing module, a mixed buffer section, and a frequency translated BPF (FTBPF) circuit module. The mixing module converts an inbound RF signal into an in-phase (I) mixed signal and a quadrature (Q) mixed signal. The mixed buffer section filters and buffers the I mixed signal and filter and buffer the Q mixed signal. The FTBPF circuit module frequency translates a baseband filter response to an IF filter response such that the FTBPF circuit module filters undesired signal components of the IF I signal and the IF Q signal to produce an inbound IF signal. The receiver IF to baseband section converts the inbound IF signal into one or more inbound symbol streams.

    Abstract translation: 无SAW接收机包括FEM接口模块,RF至IF接收机部分和接收机IF到基带部分。 RF至IF接收器部分包括混合模块,混合缓冲器部分和频率转换BPF(FTBPF)电路模块。 混合模块将入站RF信号转换为同相(I)混合信号和正交(Q)混合信号。 混合缓冲区对I混合信号进行滤波和缓冲,并对Q混合信号进行滤波和缓冲。 FTBPF电路模块频率将基带滤波器响应转换为IF滤波器响应,使得FTBPF电路模块滤除IF I信号和IF Q信号的不期望的信号分量以产生入站IF信号。 接收机IF到基带部分将入站IF信号转换成一个或多个入站符号流。

    Front-end module network for femtocell applications
    26.
    发明授权
    Front-end module network for femtocell applications 有权
    用于毫微微蜂窝应用的前端模块网络

    公开(公告)号:US09001740B2

    公开(公告)日:2015-04-07

    申请号:US13956329

    申请日:2013-07-31

    CPC classification number: H04W88/06 H04B1/406

    Abstract: A wireless communication device includes a front-end module (FEM) network, an RF connection, and a system on a chip (SOC). A first set of FEMs is operable to output, via an antenna, a first outbound RF signal to a first wireless communication device and receive a first inbound RF signal via an antenna. A second set of FEMs is operable to output, via an antenna, a second outbound RF signal to a second wireless communication device, wherein the second outbound RF signal is representative of the first inbound RF signal, and receive a second inbound RF signal via an antenna, wherein the first outbound RF signal is representative of the second inbound RF signal. The SOC is operable to activate the first and second sets of FEMs, facilitate the first outbound RF signal representing the second inbound RF signal, and facilitate the second outbound RF signal representing the first inbound RF signal.

    Abstract translation: 无线通信设备包括前端模块(FEM)网络,RF连接和芯片上的系统(SOC)。 第一组FEM可操作以经由天线经由天线将第一出站RF信号输出到第一无线通信设备,并且经由天线接收第一入站RF信号。 第二组FEM可操作以经由天线将第二出站RF信号输出到第二无线通信设备,其中第二出站RF信号表示第一入站RF信号,并经由第一入站RF信号接收第二入站RF信号 天线,其中第一出站RF信号表示第二入站RF信号。 SOC可操作以激活第一和第二组FEM,便于表示第二入站RF信号的第一出站RF信号,并且便于表示第一入站RF信号的第二出站RF信号。

    Wide band electrical balance duplexer with balanced bridge circuit
    27.
    发明授权
    Wide band electrical balance duplexer with balanced bridge circuit 有权
    宽带电平衡双工器与平衡桥电路

    公开(公告)号:US08830881B2

    公开(公告)日:2014-09-09

    申请号:US13715893

    申请日:2012-12-14

    CPC classification number: H01Q1/50 H03H7/38 H03H7/463 H04B1/44 H04B1/525 H04L5/14

    Abstract: A circuit for a wideband electrical balance duplexer (EBD) may include a first impedance element and a second impedance coupled between a first and a second node and a second and a third node of the bridge circuit, respectively. An antenna may be coupled between the first and a fourth node of the bridge circuit to receive and transmit RF signals. A balancing network may provide an impedance substantially matching an impedance of the antenna. The balancing network may be coupled between the third and the fourth node of the bridge circuit. The first or the second impedance elements may facilitate balancing the bridge circuit. One or more output nodes of a transmit path may be coupled to an input node of the bridge circuit. One or more input nodes of a receive path may be coupled between the second and the fourth node of the bridge circuit.

    Abstract translation: 用于宽带电平衡双工器(EBD)的电路可以分别包括耦合在第一和第二节点与桥接电路的第二和第三节点之间的第一阻抗元件和第二阻抗。 天线可以耦合在桥接电路的第一和第四节点之间以接收和发射RF信号。 平衡网络可以提供基本上匹配天线的阻抗的阻抗。 平衡网络可以耦合在桥接电路的第三和第四节点之间。 第一或第二阻抗元件可以有助于桥接电路的平衡。 发射路径的一个或多个输出节点可以耦合到桥接电路的输入节点。 接收路径的一个或多个输入节点可以耦合在桥接电路的第二和第四节点之间。

    BASEBAND HARMONIC REJECTION CIRCUIT
    28.
    发明申请
    BASEBAND HARMONIC REJECTION CIRCUIT 有权
    基带谐波抑制电路

    公开(公告)号:US20140155013A1

    公开(公告)日:2014-06-05

    申请号:US13734863

    申请日:2013-01-04

    Abstract: A circuit for baseband harmonic rejection includes multiple transconductance cells coupled to one another at outputs of the transconductance cells and configured to receive down-converted signals that vary from one another to produce a weighted current signal proportional to a voltage corresponding to a respective down-converted signal. The circuit also includes a feedback impedance coupled between an input of one of the transconductance cells and the outputs of the transconductance cells. Each of the transconductance cells has an effective transconductance of a first magnitude for frequency components of the down-converted signal arising from a first harmonic and an effective transconductance of a second magnitude less than the first magnitude for frequency components of the down-converted signal arising from harmonics at integer multiples of the first harmonic.

    Abstract translation: 用于基带谐波抑制的电路包括在跨导单元的输出处彼此耦合的多个跨导单元,并被配置为接收彼此变化的下变频信号,以产生与对应于相应的下变频的电压成比例的加权电流信号 信号。 电路还包括耦合在跨导单元之一的输入和跨导单元的输出之间的反馈阻抗。 每个跨导单元对于由第一谐波产生的下变频信号的频率分量和对于下变频信号的频率分量的小于第一幅度的第二幅度的有效跨导,具有第一幅度的有效跨导 从谐波在整数倍的一次谐波。

    Power Reduction and Linearizing Techniques of Transmitters
    29.
    发明申请
    Power Reduction and Linearizing Techniques of Transmitters 有权
    发射机的功率降低和线性化技术

    公开(公告)号:US20140128014A1

    公开(公告)日:2014-05-08

    申请号:US13672450

    申请日:2012-11-08

    Abstract: A transmitter includes a power amplifier driver to amplify a communication signal and a mixer connected with the power amplifier driver, the mixer to output the communication signal to the power amplifier driver. A capacitor and an inductor connect with the mixer and the power amplifier driver. The capacitor and the inductor create a resonant frequency to attenuate frequency components around a determined order of a local oscillator signal.

    Abstract translation: 发射机包括用于放大通信信号的功率放大器驱动器和与功率放大器驱动器连接的混频器,混频器将通信信号输出到功率放大器驱动器。 电容器和电感器与混频器和功率放大器驱动器连接。 电容器和电感器产生谐振频率以衰减围绕本地振荡器信号的确定阶数的频率分量。

    Method and System for Low-Noise, Highly-Linear Receiver Front-End
    30.
    发明申请
    Method and System for Low-Noise, Highly-Linear Receiver Front-End 有权
    低噪声,高线性接收机前端的方法和系统

    公开(公告)号:US20140057584A1

    公开(公告)日:2014-02-27

    申请号:US13863057

    申请日:2013-04-15

    CPC classification number: H04B1/16 H04B1/30

    Abstract: Aspects of a method and system for a low-noise, highly-linear receiver front-end are provided. In this regard, a received signal may be processed via one or more transconductances, one or more transimpedance amplifiers (TIAs), and one or more mixers to generate a first baseband signal corresponding to a voltage at a node of the receiver, and a second baseband signal corresponding to a current at the node of the receiver. The first signal and the second signal may be processed to recover information from the received signal. The first signal may be generated via a first one or more signal paths of the receiver and the second signal may be generated via a second one or more signal paths of the receiver.

    Abstract translation: 提供了一种用于低噪声,高线性接收机前端的方法和系统。 在这方面,可以经由一个或多个跨导,一个或多个跨阻抗放大器(TIAs)和一个或多个混频器来处理接收的信号,以产生对应于接收机的节点处的电压的第一基带信号,以及第二 对应于接收机节点处的电流的基带信号。 可以处理第一信号和第二信号以从接收的信号中恢复信息。 可以经由接收机的第一个或多个信号路径生成第一信号,并且可以经由接收机的第二个一个或多个信号路径来生成第二信号。

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