公开(公告)号：US20130132612A1

公开(公告)日：2013-05-23

申请号：US13662566

申请日：2012-10-29

Applicant: Ming-Hui Chiu ,  Chia-Hsin Chen

Inventor： Ming-Hui Chiu ,  Chia-Hsin Chen

IPC: G06F3/00

CPC classification number: G06F3/00 ,  G06F3/038 ,  G06F3/061 ,  G06F3/064 ,  G06F3/0674

Abstract: A data transmission device and a command merging method for data transmission are provided. The data transmission device includes a command register and a command merging unit. The command register receives and temporary storages a plurality of original commands, wherein the original commands include a plurality of memory blocks. When the command merging unit judges these memory blocks of the original commands to be a continuous memory block, the command merging unit merges the original commands into a merging command, and transmits the merging command to a peripheral device. Thus, the multiple commands send by the host can be analyzed and merged by the data transmission device to decrease a number of the commands to be proceed by the peripheral device, so as to speed up a command processing time of the peripheral device efficiently.

Abstract translation: 提供了一种用于数据传输的数据传输设备和命令合并方法。 数据传输装置包括命令寄存器和命令合并单元。 命令寄存器接收和临时存储多个原始命令，其中原始命令包括多个存储器块。 当命令合并单元将原始命令的这些存储块判断为连续存储块时，命令合并单元将原始命令合并成合并命令，并将合并命令发送到外围设备。 因此，由主机发送的多个命令可以由数据传输装置进行分析和合并，以减少由外围设备进行的命令的数量，以便有效地加速外围设备的命令处理时间。

公开(公告)号：US20120002104A1

公开(公告)日：2012-01-05

申请号：US13108007

申请日：2011-05-16

Applicant: Chia-Hsin Chen ,  Wen-Chieh Chiang

Inventor： Chia-Hsin Chen ,  Wen-Chieh Chiang

IPC: H04N7/01

CPC classification number: G09G3/2096

Abstract: A portable display apparatus of a video signal including a video signal source, a signal masking module, and a display panel is provided. The video signal source generates a data enable signal and a clock signal. The signal masking module is electrically connected to the video signal source, receives the data enable signal and the clock signal, and masks a part of the clock signal according to the data enable signal and a masking signal to provide a processing signal. The display panel is electrically connected to the signal masking module, receives the processing signal, and displays a part of the video signal to be an image according to the processing signal.

Abstract translation: 提供了包括视频信号源，信号屏蔽模块和显示面板的视频信号的便携式显示装置。 视频信号源产生数据使能信号和时钟信号。 信号屏蔽模块电连接到视频信号源，接收数据使能信号和时钟信号，并根据数据使能信号和屏蔽信号屏蔽一部分时钟信号以提供处理信号。 显示面板电连接到信号屏蔽模块，接收处理信号，并根据处理信号将视频信号的一部分显示为图像。

公开(公告)号：US20090049233A1

公开(公告)日：2009-02-19

申请号：US12014991

申请日：2008-01-16

Applicant: Chia-Hsin Chen ,  Chun-Kun Lee

Inventor： Chia-Hsin Chen ,  Chun-Kun Lee

IPC: G06F12/00

CPC classification number: G06F12/0804 ,  G06F2212/2022

Abstract: A method for operating a flash memory is provided. The flash memory comprises a controller, a cache, and a plurality of blocks. By using a cache to preload data from the host, the buffer of the controller can be smaller than the capacity of a single block or omitted entirely. Smooth data transmission is still maintained.

Abstract translation: 提供了一种用于操作闪速存储器的方法。 闪存包括控制器，高速缓存和多个块。 通过使用缓存从主机预加载数据，控制器的缓冲区可以小于单个块的容量或完全省略。 平稳的数据传输仍然保持不变。

公开(公告)号：US20090027237A1

公开(公告)日：2009-01-29

申请号：US12060874

申请日：2008-04-02

Applicant: Chia-Hsin Chen

Inventor： Chia-Hsin Chen

IPC: H03M11/00 ,  H03K17/94

CPC classification number: H03M11/20

Abstract: A key system includes a microcontroller and a plurality of keys. The first ends of the keys are coupled to a plurality of data input ports of the microcontroller respectively. The second ends of the keys are coupled to a key input port of the microcontroller. The key system utilizes the data signals inputted to the microcontroller as scan signals for the keys. The signal received by the key input port is detected to determine which key is triggered. Thus, only one key input port is sufficient to detect which of the plurality of keys is triggered.

Abstract translation: 关键系统包括微控制器和多个键。 键的第一端分别耦合到微控制器的多个数据输入端口。 键的第二端耦合到微控制器的键输入端口。 关键系统利用输入到微控制器的数据信号作为键的扫描信号。 检测由密钥输入端口接收到的信号，以确定哪个键被触发。 因此，只有一个键输入端口足以检测多个键中的哪一个被触发。

公开(公告)号：US07007175B2

公开(公告)日：2006-02-28

申请号：US10005627

申请日：2001-12-04

Applicant: Nai-Shung Chang ,  Chia-Hsing Yu ,  Chia-Hsin Chen

Inventor： Nai-Shung Chang ,  Chia-Hsing Yu ,  Chia-Hsin Chen

IPC: G06F1/26

CPC classification number: G06F1/3275 ,  G06F1/3203 ,  Y02D10/14 ,  Y02D50/20

Abstract: A motherboard with reduced power consumption is disclosed. The motherboard has a memory module slot, a DDR termination array, and a control chip. The DDR termination array couples to the memory module slot and provides a termination resistor that has one terminal coupled to a voltage source. The control chip provides a control signal. When the motherboard enters a power saving mode or before the memory module being inserted in the memory module slot, the control signal gives an indication to the DDR termination array for cutting off the connection between the termination resistor and the memory module slot. A switch and several termination resistors may substitute the DDR termination array as requirements. The control chip provides the control signal to open the switch and therefore cuts off the connections between termination resistors and the voltage source to achieve the power-conserving purpose.

公开(公告)号：US06970477B2

公开(公告)日：2005-11-29

申请号：US09683647

申请日：2002-01-29

Applicant: Ching-Fu Chuang ,  Chia-Hsin Chen

Inventor： Ching-Fu Chuang ,  Chia-Hsin Chen

IPC: H04L1/08 ,  H04L12/54

CPC classification number: H04L1/08

Abstract: A data transmission circuit has an internal circuit for providing data, a register electrically connected to the internal circuit for temporarily storing the data transmitted from the input internal circuit, and a control circuit for controlling operations of the data transmission circuit. If data inputted to the register is specific data, the internal circuit will repeatedly output the specific data to the register so as to prolong transmission time of the specific data.

Abstract translation: 数据传输电路具有用于提供数据的内部电路，电连接到内部电路的用于临时存储从输入内部电路发送的数据的寄存器和用于控制数据传输电路的操作的控制电路。 如果输入到寄存器的数据是特定数据，则内部电路将重复地将特定数据输出到寄存器，以便延长特定数据的传输时间。

公开(公告)号：US06603300B2

公开(公告)日：2003-08-05

申请号：US09989381

申请日：2001-11-21

Applicant: Yu-Wei Lin ,  Chia-Hsin Chen

Inventor： Yu-Wei Lin ,  Chia-Hsin Chen

IPC: G01R23175

CPC classification number: H03L7/0814 ,  H03L7/085

Abstract: A phase detecting device, including a phase detector, an inversion logic circuit, a latch and an OR logic circuit, is used for detecting the phase difference between a reference signal and a feedback signal and for outputting a delay control signal. The phase detector generates a detected signal according to the status of the feedback signal captured by the reference signal. The inversion logic circuit inverts the detected signal, and the delay device delays the detected signal. The delayed inverted detected signal is then fed into the latch device to generate a latch signal. As the detected signal and the latch signal are fed into the OR logic circuit, the OR logic circuit feeds the delay control signal into the counter so that the delay circuit can generate different delay time, such as T/4, T/2 or 1T, for meeting different signal-delay requirements.

公开(公告)号：US09529709B2

公开(公告)日：2016-12-27

申请号：US13113376

申请日：2011-05-23

Applicant: Chi-Lung Wang ,  Chia-Hsin Chen ,  Chien-Cheng Lin

Inventor： Chi-Lung Wang ,  Chia-Hsin Chen ,  Chien-Cheng Lin

IPC: G06F12/00 ,  G06F12/02 ,  G06F12/10

CPC classification number: G06F12/0246 ,  G06F12/10 ,  G06F2212/7201

Abstract: A method for maintaining address mapping for a flash memory module is disclosed including: recording a first set of addresses corresponding to a first set of sequential logical addresses in a first section of a first addressing block; recording a second set of addresses corresponding to a second set of sequential logical addresses in a second section of the first addressing block; recording a third set of addresses corresponding to a third set of sequential logical addresses in a first section of a second addressing block; and recording a fourth set of addresses corresponding to a fourth set of sequential logical addresses in a second section of the second addressing block; wherein the second set of logical addresses is successive to the first set of logical addresses, and the third set of logical addresses is successive to the second set of logical addresses.

Abstract translation: 公开了一种用于维护闪存模块的地址映射的方法，包括：在第一寻址块的第一部分中记录对应于第一组顺序逻辑地址的第一组地址; 在第一寻址块的第二部分中记录对应于第二组顺序逻辑地址的第二组地址; 在第二寻址块的第一部分中记录对应于第三组顺序逻辑地址的第三组地址; 以及在所述第二寻址块的第二部分中记录与第四组顺序逻辑地址对应的第四组地址; 其中所述第二组逻辑地址连续到所述第一组逻辑地址，并且所述第三组逻辑地址连续到所述第二组逻辑地址。

公开(公告)号：US20130063474A1

公开(公告)日：2013-03-14

申请号：US13541642

申请日：2012-07-03

Applicant: Chia-Hsin Chen

Inventor： Chia-Hsin Chen

IPC: G09G5/02

CPC classification number: G09G3/3611 ,  G09G2300/0452 ,  G09G2340/06

Abstract: A color signal conversion method suitable for a multi-primary color LCD is provided, which includes converting an RGB (red, green, blue) color input signal into a YUV (brightness-chroma) color signal; performing a compensation on a chroma (UV) signal of the YUV color signal according to a minimum color signal of the RGB color input signal and a brightness (Y) signal of the YUV color signal, so as to output a compensated YUV color signal, and providing a W (white) color output signal according to the minimum color signal of the RGB color input signal; and converting the compensated YUV color signal into an RGB color output signal.

Abstract translation: 提供了适用于多原色LCD的彩色信号转换方法，其包括将RGB（红，绿，蓝）彩色输入信号转换为YUV（亮度 - 色度）色彩信号; 根据RGB彩色输入信号的最小颜色信号和YUV颜色信号的亮度（Y）信号对YUV彩色信号的色度（UV）信号进行补偿，以输出补偿的YUV颜色信号， 并根据RGB彩色输入信号的最小颜色信号提供W（白色）彩色输出信号; 并将补偿的YUV颜色信号转换成RGB颜色输出信号。

公开(公告)号：US20130016133A1

公开(公告)日：2013-01-17

申请号：US13467991

申请日：2012-05-09

Applicant: Chia-Hsin Chen ,  Tsung-Ping Wei ,  Chiu-Yuan Lin

Inventor： Chia-Hsin Chen ,  Tsung-Ping Wei ,  Chiu-Yuan Lin

IPC: G09G3/36 ,  G09G5/10 ,  F21V13/04 ,  G02F1/13357 ,  F21V8/00 ,  F21V13/02

CPC classification number: G09G3/3426 ,  G02B6/0031 ,  G02B6/0073 ,  G02B6/0075 ,  G02B6/0083 ,  G09G3/3413 ,  G09G2320/0238

Abstract: A backlight module and a liquid crystal display (LCD) device using the same are provided. The backlight module includes a light-guide plate and a light source module. The light-guide plate has a first side surface and a second side surface, wherein the second side surface is tangent with the first side surface. The light source module is disposed beside the first side surface and the second side surface of the light-guide plate, and a plurality of first light emitting diode (LED) units and a plurality of second LED units are respectively disposed at portions of the light source module that face the first side surface and the second side surface of the light-guide plate. Thereby, the backlight module has the advantages of high image contrast and low power consumption offered by a direct type backlight module and maintains the thickness of a side-edge backlight module.

Abstract translation: 提供了使用其的背光模块和液晶显示（LCD）装置。 背光模块包括导光板和光源模块。 导光板具有第一侧表面和第二侧表面，其中第二侧表面与第一侧表面相切。 光源模块设置在导光板的第一侧表面和第二侧表面旁边，并且多个第一发光二极管（LED）单元和多个第二LED单元分别设置在光的部分 源模块，其面对导光板的第一侧面和第二侧面。 因此，背光模块具有由直接型背光模块提供的高图像对比度和低功耗的优点，并且保持侧边背光模块的厚度。