Method and system for processing image signals and computer program product therefor
    21.
    发明授权
    Method and system for processing image signals and computer program product therefor 有权
    图像信号处理方法及系统及其计算机程序产品

    公开(公告)号:US07529299B2

    公开(公告)日:2009-05-05

    申请号:US10938426

    申请日:2004-09-10

    CPC classification number: H04N19/90

    Abstract: A digital video image is compressed by determining for a group of adjacent pixels the global error values that result from the available combinations of truncation and integration of data strings associated with the group of pixels. A combination of truncation and integration that produces a minimum global error value is identified and used to control compression of the individual strings of data associated with the group of pixels.

    Abstract translation: 通过从一组相邻像素确定由与像素组相关联的数据串的截断和积分的可用组合产生的全局误差值来压缩数字视频图像。 识别产生最小全局误差值的截断和积分的组合,并用于控制与该组像素相关联的各个数据串的压缩。

    Process for the format conversion of MPEG bitstreams, a system and computer program product therefor
    22.
    发明授权
    Process for the format conversion of MPEG bitstreams, a system and computer program product therefor 有权
    用于MPEG比特流的格式转换的过程,系统和计算机程序产品

    公开(公告)号:US07369613B2

    公开(公告)日:2008-05-06

    申请号:US10243081

    申请日:2002-09-12

    CPC classification number: H04N19/40 H04N19/59

    Abstract: A process for format conversion of DCT macroblocks in an MPEG video bitstream that are divided into blocks, each of which includes a plurality of microblocks. In each DCT block, the significant frequencies are identified and preserved, isolating a corresponding microblock preferably consisting of the microblock on the top left of each block and setting to zero the coefficients of the remaining microblocks. On the microblock thus isolated there is performed an inverse discrete cosine transform, and the microblock thus obtained is merged with the homologous microblocks obtained from the other blocks comprised in a respective starting macroblock, so as to give rise to a merging block. The merging block thus obtained undergoes a discrete cosine transform so as to obtain a final block, which can be assembled into a macroblock with converted format.

    Abstract translation: MPEG视频比特流中的DCT宏块的格式转换处理,被分成块,每个块包括多个微块。 在每个DCT块中,识别和保存有效频率,隔离优选地由每个块的左上角的微块组成的相应微块,并将剩余微块的系数设置为零。 在这样隔离的微块上,执行逆离散余弦变换,并且由此获得的微块与从包含在相应起始宏块中的其他块获得的同源微块合并,以产生合并块。 如此获得的合并块经历离散余弦变换,以获得最终的块,其可以被组合成具有转换格式的宏块。

    Process for changing the resolution of MPEG bitstreams, and a system and a computer program product therefor
    23.
    发明授权
    Process for changing the resolution of MPEG bitstreams, and a system and a computer program product therefor 有权
    用于改变MPEG比特流的分辨率的过程,以及用于其的系统和计算机程序产品

    公开(公告)号:US07254174B2

    公开(公告)日:2007-08-07

    申请号:US10075087

    申请日:2002-02-11

    CPC classification number: H04N19/59 H04N19/40 H04N19/48 H04N19/90

    Abstract: A process and a system is described for generating an MPEG output bitstream starting from an MPEG input bitstream. The output bitstream has a resolution modified with respect to the resolution of the input bitstream. In the input bitstream, first portions that substantially do not affect and second portions that do affect resolution variation are distinguished. The second portions are then subjected to a function of modification of the resolution obtained by filtering the second portions in a domain of the discrete cosine transform, and then are transferred to the output bitstream. A corresponding computer program product is also provided.

    Abstract translation: 描述了从MPEG输入比特流开始生成MPEG输出比特流的过程和系统。 输出比特流具有关于输入比特流的分辨率修改的分辨率。 在输入比特流中,区分实质上不影响的第一部分和确实影响分辨率变化的第二部分。 然后对第二部分进行通过对离散余弦变换的域中的第二部分进行滤波而获得的分辨率的修改的功能,然后被传送到输出比特流。 还提供了相应的计算机程序产品。

    Geometric processing stage for a pipelined graphic engine, corresponding method and computer program product therefor
    24.
    发明申请
    Geometric processing stage for a pipelined graphic engine, corresponding method and computer program product therefor 有权
    流水线图形引擎的几何处理阶段,相应的方法和计算机程序产品

    公开(公告)号:US20050190183A1

    公开(公告)日:2005-09-01

    申请号:US10886939

    申请日:2004-07-07

    CPC classification number: G06T15/005 G06T15/40

    Abstract: A geometric processing stage for a pipelined engine for processing video signals and generating processed video signal in space coordinates (S) adapted for display on a screen. The geometric processing stage includes: a model view module for generating projection coordinates of primitives of the video signals in a view space, said primitives including visible and non-visible primitives, a back face culling module arranged downstream of the model view module for at least partially eliminating the non visible primitives, a projection transform module for transforming the coordinates of the video signals from view space coordinates into normalized projection coordinates (P), and a perspective divide module for transforming the coordinates of the video signals from normalized projection (P) coordinates into screen space coordinates (S). The back face culling module is arranged downstream the projection transform module and operates on normalized projection (P) coordinates of said primitives. The perspective divide module is arranged downstream the back face culling module for transforming the coordinates of the video signals from normalized projection (P) coordinates into screen space coordinates (S). A circuit in the back face culling module can be shared with a standard three dimension back face culling operation when necessary. An application is in graphic engines using standard graphics language like OpenGL and NokiaGL.

    Abstract translation: 一种用于处理视频信号并且在适于在屏幕上显示的空间坐标(S))中生成经处理的视频信号的流水线引擎的几何处理级。 所述几何处理阶段包括:模型视图模块,用于在视图空间中产生所述视频信号的图元的投影坐标,所述图元包括可见和不可见的图元,背景剔除模块,布置在模型视图模块的下游,用于至少 部分地消除不可见原始图像的投影变换模块,用于将视频信号的坐标从视距空间坐标变换为归一化投影坐标(P);以及透视分割模块,用于将来自标准化投影(P)的视频信号的坐标变换, 坐标到屏幕空间坐标(S)。 背面剔除模块设置在投影变换模块的下游,并对所述图元的标准化投影(P)坐标进行操作。 透视分割模块设置在背面拣选模块的下游,用于将视频信号的坐标从标准化投影(P)坐标变换为屏幕空间坐标(S)。 背面剔除模块中的电路可以在需要时与标准的三维背面拣选操作共享。 应用程序是使用OpenGL和NokiaGL等标准图形语言的图形引擎。

    VLSI architecture, in particular for motion estimation applications
    25.
    发明授权
    VLSI architecture, in particular for motion estimation applications 有权
    VLSI架构,特别是运动估计应用

    公开(公告)号:US06724823B2

    公开(公告)日:2004-04-20

    申请号:US09948131

    申请日:2001-09-06

    CPC classification number: G06T7/238 G06T2207/10016

    Abstract: A VLSI architecture adapted to be implemented in the form of a reusable IP cell and including a motion estimation engine, configured to process a cost function and identify a motion vector which minimizes the cost function, an internal memory configured to store the sets of initial candidate vectors for the blocks of a reference frame, first and second controllers to manage the motion vectors and manage an external frame memory, a reference synchronizer to align, at the input to the estimation engine, the data relevant to the reference blocks with the data relevant to candidate blocks coming from the second controller, and a control unit for timing the units included in the architecture and the external interfacing of the architecture itself.

    Abstract translation: 适于以可重复使用的IP小区的形式实施并包括运动估计引擎的VLSI架构,其被配置为处理成本函数并且识别使成本函数最小化的运动向量;配置为存储初始候选组的内部存储器 用于参考帧的块的矢量,用于管理运动矢量和管理外部帧存储器的第一和第二控制器,参考同步器,用于在估计引擎的输入处对准具有数据相关的参考块的数据 到来自第二控制器的候选块,以及控制单元,用于对包括在架构中的单元和架构本身的外部接口进行定时。

    Measurement of activity of video image by DCT and filtering of the prediction error coefficients
    26.
    发明授权
    Measurement of activity of video image by DCT and filtering of the prediction error coefficients 有权
    通过DCT测量视频图像的活动度和滤波预测误差系数

    公开(公告)号:US06542643B1

    公开(公告)日:2003-04-01

    申请号:US09657433

    申请日:2000-09-07

    Abstract: A method for measuring the activity of a macroblock of a video picture in the direct cosine transform domain of values assumed by a selected component of the video signal includes dividing the macroblock into blocks of data in the discrete cosine transform domain before quantization, and separately storing each block of data in a memory. The method further includes reading each block of data stored in the memory for obtaining respective coefficients, and multiplying an absolute value of each coefficient by a selected mask of words comprising a number of words not exceeding a number of words forming each block. The results of the multiplications are summed for producing an activity coefficient for each block. A first activity coefficient of the macroblock is calculated corresponding to a sum of the activity coefficients produced for each block. A normalized activity value of the macroblock is calculated as the ratio between a sum of double the first activity coefficient with a mean activity coefficient relative to a preceding coded frame, and a sum of double the mean activity coefficient with the first activity coefficient.

    Abstract translation: 用于测量由视频信号的选定分量假设的值的直接余弦变换域中的视频图像的宏块的活动性的方法包括在量化之前将宏块划分为离散余弦变换域中的数据块,并且分别存储 每个数据块在一个内存中。 该方法还包括读取存储在存储器中的每个数据块以获得相应的系数,并且将每个系数的绝对值乘以包括不超过形成每个块的字数的字数的所选择的单词。 将乘法的结果相加以产生每个块的活动系数。 对应于针对每个块产生的活动系数的和来计算宏块的第一活动系数。 将宏块的归一化活动值计算为第一活动系数的双倍与相对于先前编码帧的平均活动系数之和的比值,以及平均活动系数与第一活动系数的两倍之和。

    Windowed clock generation
    27.
    发明授权
    Windowed clock generation 失效
    窗口时钟生成

    公开(公告)号:US5995578A

    公开(公告)日:1999-11-30

    申请号:US784966

    申请日:1997-01-16

    Applicant: Danilo Pau

    Inventor: Danilo Pau

    CPC classification number: H03K3/70 H03K5/135 H03K5/1565

    Abstract: Perfectly resynchronized windowed clock signals are constructed starting from a main clock signal of the same frequency of that of the active phases of the constructed windowed clock signal, advantageously without requiring a main clock of a higher frequency.

    Abstract translation: 完全重新同步的窗口时钟信号是从构成的窗口时钟信号的有源相位频率相同频率的主时钟信号开始构建的,有利地不需要较高频率的主时钟。

    Memory reduction in the MPEG-2 main profile main level decoder
    28.
    发明授权
    Memory reduction in the MPEG-2 main profile main level decoder 失效
    MPEG-2主配置文件主级解码器的内存缩减

    公开(公告)号:US5923375A

    公开(公告)日:1999-07-13

    申请号:US799143

    申请日:1997-02-13

    Applicant: Danilo Pau

    Inventor: Danilo Pau

    CPC classification number: H04N19/423 H04N19/61

    Abstract: The video memory requisite of an MPEG-2 decoder commonly comprising a stage of decompression of the respective I, P and B-pictures of the MPEG compression algorithm before writing the data in respective buffers organized in the video memory and in which the decompression of a B-picture implies the use of forward and backward motion compensation predictors is reduced without losing image quality. This is achieved by: decompressing by macroblocks a B-picture while maintaining the relative backward predictor, stored in the memory, in a compressed form and decompressing macroblocks of a compressed P-picture using the respective forward predictor values; defining through the decompressed P-macroblocks the region of the stored compressed backward predictor containing the backward predictor value of the macroblock of the B-picture undergoing decompression; and extracting from the region the respective backward predictor value for the B-macroblock undergoing decompression, and completing the motion compensation routine according to the MPEG standard.

    Abstract translation: 在将数据写入在视频存储器中组织的相应缓冲器中之前,MPEG-2解码器的视频存储器必需条件通常包括解压缩MPEG压缩算法的相应I,P和B图像的阶段,并且其中解压缩 B图片意味着使用前向和后向运动补偿预测器被减少而不会失去图像质量。 这通过以下方式实现:通过宏块对B图像进行解压缩,同时以压缩形式保存存储在存储器中的相对后向预测器,并使用相应的前向预测值对压缩的P图像进行解压缩; 通过解压缩的P宏块定义包含经历减压的B图像的宏块的向后预测值的存储的压缩后向预测器的区域; 从该区域提取经历解压缩的B块的各自的反向预测值,并根据MPEG标准完成运动补偿例程。

    Method and system for signal processing, for instance for mobile 3D graphic pipelines, and computer program product therefor
    29.
    发明授权
    Method and system for signal processing, for instance for mobile 3D graphic pipelines, and computer program product therefor 有权
    用于信号处理的方法和系统,例如用于移动3D图形管线及其计算机程序产品

    公开(公告)号:US08224107B2

    公开(公告)日:2012-07-17

    申请号:US13013324

    申请日:2011-01-25

    CPC classification number: G06T11/40

    Abstract: A system renders a primitive of an image to be displayed, for instance in a mobile 3D graphic pipeline, the primitive including a set of pixels. The system locates the pixels in the area of the primitive, generates, for each pixel located in the area, a set of associated sub-pixels, borrows a set of sub-pixels from neighboring pixels, subjects the set of associated sub-pixels and the borrowed set of pixels to adaptive filtering to create an adaptively filtered set of sub-pixels, and further filters the adaptively filtered set of sub-pixels to compute a final pixel for display. Preferably, the set of associated sub-pixels fulfills at least one of the following: the set includes two associated sub-pixels and the set includes associated sub-pixels placed on pixel edges.

    Abstract translation: 系统呈现要显示的图像的原语,例如在移动3D图形流水线中,该图元包括一组像素。 系统定位基元区域中的像素,为位于该区域中的每个像素产生一组相关联的子像素,从相邻像素借用一组子像素,对该组相关联的子像素进行对象,以及 将借用的像素集合进行自适应滤波以创建自适应滤波的子像素组,并且进一步对自适应滤波的子像素组进行滤波以计算用于显示的最终像素。 优选地,该组相关联的子像素满足以下中的至少一个:该集合包括两个相关联的子像素,并且该集合包括放置在像素边缘上的相关联的子像素。

    Coprocessor circuit architecture, for instance for digital encoding applications
    30.
    发明授权
    Coprocessor circuit architecture, for instance for digital encoding applications 有权
    协处理器电路架构,例如用于数字编码应用

    公开(公告)号:US06996179B2

    公开(公告)日:2006-02-07

    申请号:US09819940

    申请日:2001-03-27

    CPC classification number: H04N19/53 H04N19/433

    Abstract: A coprocessor circuit for processing image data in digital form, having a motion vector controller block for generating, starting from the image data, motion vector values that include predictor data and macroblock data relating to a current macroblock of the image data to be estimated and being adapted to be stored at respective memory addresses. Also included is an address generator block for extracting respective addresses from the motion vector values, a predictor fetch block for retrieving predictor data based on respective addresses extracted by the address generator block, a current macroblock fetch and distengine block for retrieving macroblock data based on respective addresses extracted by the address generator block and for processing the macroblock data according to a given function, and a decision block for collecting the retrieved data as partial results and selecting the best result therefrom.

    Abstract translation: 一种用于处理数字形式的图像数据的协处理器电路,具有运动矢量控制器块,用于从图像数据开始,生成包括与要估计的图像数据的当前宏块有关的预测数据和宏块数据的运动矢量值 适于存储在相应的存储器地址。 还包括用于从运动矢量值中提取相应地址的地址生成器块,用于基于由地址生成器块提取的相应地址检索预测变量数据的预测器获取块,用于基于相应的宏块数据来检索宏块数据的当前宏块读取和分发引擎块 由地址生成器块提取的地址,并根据给定的功能处理宏块数据;判定块,用于收集检索的数据作为部分结果,并从中选择最佳结果。

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