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公开(公告)号：US07580481B2
公开(公告)日：2009-08-25
申请号：US10836775
申请日：2004-04-30
IPC分类号： H04L27/00
CPC分类号： H04L27/364
摘要： Timing correction is affected for mismatch between channels in an I/Q demodulator. The respective demodulated I-channel and Q-channel are correlated and integrated so generate a timing control signal that is applied to a variable delay element. The variable delay element inserts a variable time delay in an ADC clock signal that is applied to either the I-channel ADC or the Q-channel ADC.
摘要翻译： 定时校正受I / Q解调器通道之间不匹配的影响。 相应的解调的I信道和Q信道被相关和积分，从而产生应用于可变延迟元件的定时控制信号。 可变延迟元件在应用于I通道ADC或Q通道ADC的ADC时钟信号中插入可变时间延迟。
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22.发明授权公开(公告)号：US07167694B2
公开(公告)日：2007-01-23
申请号：US10412871
申请日：2003-04-14
IPC分类号： H04B7/08
CPC分类号： H04N5/4446 , H03D3/006 , H03D3/007 , H03L7/18 , H04H40/90 , H04N5/4401 , H04N5/50 , H04N7/20 , H04N21/4263
摘要： Multi-tuner receiver architectures and associated methods are disclosed that provide initial analog coarse tuning of desired channels within a received signal spectrum, such as transponder channels within a set-top box signal spectrum for satellite communications. These multi-tuner satellite receiver architectures provide significant advantages over prior direct down-conversion (DDC) architectures and low intermediate-frequency (IF) architectures, particularly where two tuners are desired on the same integrated circuit. Rather than using a low-IF frequency or directly converting the desired channel frequency to DC, initial coarse tuning provided by analog coarse tuning circuitry allows for a conversion to a frequency range around DC. This coarse tuning circuitry can be implemented, for example, using a large-step local oscillator (LO) that provides a coarse tune analog mixing signal. Once mixed down, the desired channel may then be fine-tuned through digital processing, such as through the use of a wide-band analog-to-digital converter (ADC) or a narrow-band tunable bandpass ADC.
摘要翻译： 公开了多调谐器接收机架构和相关方法，其提供在接收信号频谱内的期望信道的初始模拟粗调，例如用于卫星通信的机顶盒信号频谱内的应答器信道。 这些多调谐器卫星接收机架构提供了优于先前的直接下变频（DDC）架构和低中频（IF）架构的显着优点，特别是在同一集成电路上需要两个调谐器时。 不是使用低IF频率或直接将期望的信道频率转换为DC，而是由模拟粗调谐电路提供的初始粗调调可以转换到大约DC的频率范围。 该粗调谐电路可以例如使用提供粗调模拟混频信号的大步本地振荡器（LO）来实现。 一旦混合，则可以通过数字处理（例如通过使用宽带模数转换器（ADC）或窄带可调谐带通ADC）来微调所需的信道。
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公开(公告)号：US06313769B1
公开(公告)日：2001-11-06
申请号：US09563874
申请日：2000-05-03
IPC分类号： H03M106
CPC分类号： H03M1/1019 , H03M1/66
摘要： A signal processing system includes a main digital-to-analog converter (DAC) for receiving a digital baseband signal and converting the digital signal into an analog signal. Also included in the system is a connection circuit for receiving the analog signal, and output terminal, and an analog filter coupled between the connection circuit and the output terminal for filtering the analog signal. The system includes a calibration circuit coupled between the connection circuit and the output terminal for setting an offset voltage level. The calibration circuit includes (a) an approximation circuit coupled to the output terminal and operable during a calibration mode to determine the offset voltage level and store the offset voltage level as a digital offset signal and (b) an offset DAC coupled between the connection circuit and the approximation circuit for converting the digital offset signal into the offset voltage level. The connection circuit, which is a node, subtracts the offset voltage level from the analog signal.
摘要翻译： 信号处理系统包括用于接收数字基带信号并将数字信号转换为模拟信号的主数/模转换器（DAC）。 该系统还包括用于接收模拟信号的连接电路和输出端子，以及耦合在连接电路和输出端子之间的模拟滤波器，用于对模拟信号进行滤波。 该系统包括耦合在连接电路和输出端子之间的校准电路，用于设定偏移电压电平。 校准电路包括（a）耦合到输出端并且可在校准模式期间操作以确定偏移电压电平并将偏移电压电平存储为数字偏移信号的近似电路，以及（b）耦合在连接电路 以及用于将数字偏移信号转换为偏移电压电平的近似电路。 作为节点的连接电路从模拟信号中减去偏移电压电平。
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24.发明授权公开(公告)号：US06181212B2
公开(公告)日：2001-01-30
申请号：US09238990
申请日：1999-01-28
IPC分类号： H03L7197
CPC分类号： H03C3/0933 , H03C3/40 , H03D7/163 , H03D7/165 , H03L7/1976 , H04B1/00 , H04B1/28 , H04B1/406
摘要： A method and apparatus for generating two disparate frequency reference signals using a single phase locked loop. The circuit includes a local oscillator for generating a reference signal and a phase comparator for comparing the reference signal with a feedback signal. The output of the phase comparator is converted to a first one of the desired output frequencies by a voltage controlled oscillator. That signal is also fed to a variable frequency divider circuit under control of a &Sgr;/&Dgr; converter which generates a lower frequency signal without creating a secondary frequency tone. The lower frequency signal is the second of the output frequencies. This signal also is fed back to the second input of the phase comparator through a fixed frequency divider.
摘要翻译： 一种用于使用单个锁相环产生两个不同频率参考信号的方法和装置。 电路包括用于产生参考信号的本地振荡器和用于将参考信号与反馈信号进行比较的相位比较器。 相位比较器的输出通过压控振荡器转换成所需输出频率的第一个。 该信号也在SIGMA / DELTA转换器的控制下馈送到可变分频器电路，该转换器产生较低频率信号而不产生辅助频率音调。 低频信号是输出频率的第二个。 该信号也通过固定分频器反馈到相位比较器的第二输入端。
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公开(公告)号：US6121827A
公开(公告)日：2000-09-19
申请号：US293510
申请日：1999-04-15
CPC分类号： H01L23/50 , H01L24/49 , H01L2223/6611 , H01L2223/6688 , H01L2224/05553 , H01L2224/48091 , H01L2224/48227 , H01L2224/49113 , H01L24/48 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/14 , H01L2924/3025
摘要： A mixed signal integrated circuit board having decreased sensitivity of analog circuitry to digital circuitry noise is disclosed. In the mixed-signal integrated board of the present invention, a new (second) analog ground is created. This new analog ground is not limited by the manufacturing specification of connectivity to the substrate of the circuit board and is thereby free of transient noise generated by digital components on the board. In a mixed-signal integrated circuit board of the present invention, the new analog ground becomes the preferred ground and is utilized in many sensitive analog applications including voltage and current measurements. The new analog ground is easy to create as it does not involved complicated circuitry. The new analog ground may be created even after the initial circuit schematics has been created.
摘要翻译： 公开了一种具有降低的模拟电路对数字电路噪声灵敏度的混合信号集成电路板。 在本发明的混合信号集成电路板中，产生新的（第二）模拟地。 这种新的模拟接地不受电路板基板的连接的制造规范的限制，从而不受板上数字部件产生的瞬态噪声的影响。 在本发明的混合信号集成电路板中，新的模拟地被成为优选的地面，并被用于包括电压和电流测量在内的许多敏感的模拟应用中。 新的模拟地线容易创建，因为它不涉及复杂的电路。 即使在创建初始电路原理图之后，也可能会创建新的模拟地。
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公开(公告)号：US5841382A
公开(公告)日：1998-11-24
申请号：US820819
申请日：1997-03-19
摘要： Testing of digital-to-analog converters is accelerated by applying one or more different approaches. One approach relies on a switched capacitor, which lowers the overall capacitance of the converter during testing, thereby reducing the settling time for each code value. Another approach makes the duration of each testing step a function of the particular code value, rather than using the worst-case settling time for each testing step. Yet another approach uses a sequence of non-consecutive code values to determine whether each switch in the converter is functional. Using non-consecutive code values permits the use of partial settling times during converter testing. Each of the approaches can be used to accelerate the testing of D/A converters, whether they have linear or folded resistor strings.
摘要翻译： 通过应用一种或多种不同的方法来加速数模转换器的测试。 一种方法依赖于开关电容器，其在测试期间降低转换器的总体电容，从而减少每个代码值的建立时间。 另一种方法使得每个测试步骤的持续时间是特定代码值的函数，而不是使用每个测试步骤的最坏情况建立时间。 另一种方法使用非连续代码值序列来确定转换器中的每个开关是否功能。 使用非连续代码值允许在转换器测试期间使用部分建立时间。 可以使用每种方法来加速D / A转换器的测试，无论它们是线性还是折叠电阻串。
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27.发明授权Low noise amplifier and method of input impedance control for terrestrial and cable modes 有权低噪声放大器和地面和电缆模式的输入阻抗控制方法公开(公告)号：US08611844B2
公开(公告)日：2013-12-17
申请号：US13344227
申请日：2012-01-05
IPC分类号： H04B1/16
CPC分类号： H04N5/455 , H04B1/18 , H04H40/27 , H04N21/42607 , H04N21/6112 , H04N21/6118
摘要： A low noise amplifier (LNA) for use in a receiver circuit includes an adjustable impedance network including an input for receiving a radio frequency signal, a plurality of control inputs, and an output. The LNA further includes a controller coupled to the plurality of control inputs and configured to control an impedance of the adjustable impedance network. The controller controls the adjustable impedance network to provide a relatively low impedance in a terrestrial mode and to provide a relatively high impedance in a cable mode.
摘要翻译： 用于接收器电路的低噪声放大器（LNA）包括可调阻抗网络，其包括用于接收射频信号的输入，多个控制输入和输出。 LNA还包括耦合到多个控制输入并被配置为控制可调阻抗网络的阻抗的控制器。 控制器控制可调阻抗网络以在地面模式中提供相对较低的阻抗并且在电缆模式中提供相对较高的阻抗。
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公开(公告)号：US20130279636A1
公开(公告)日：2013-10-24
申请号：US13923824
申请日：2013-06-21
申请人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager , Abdulkerim L. Coban
IPC分类号： H04B1/28
摘要： A receiver includes an input section, a plurality of RF sections, an output circuit, and a controller. The input section receives and amplifies a radio frequency (RF) input signal to provide an amplified RF signal, and has a gain input. The plurality of RF sections each have an input for receiving the amplified RF signal, and an output for providing an intermediate frequency signal. The output circuit provides an intermediate frequency output signal in response to an output of at least one of the plurality of RF sections. The controller has an output coupled to the gain input of the input section.
摘要翻译： 接收机包括输入部分，多个RF部分，输出电路和控制器。 输入部分接收和放大射频（RF）输入信号以提供放大的RF信号，并具有增益输入。 多个RF部分各自具有用于接收放大的RF信号的输入端和用于提供中频信号的输出端。 输出电路响应于多个RF部分中的至少一个的输出而提供中频输出信号。 控制器具有耦合到输入部分的增益输入的输出。
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公开(公告)号：US08145172B2
公开(公告)日：2012-03-27
申请号：US12277866
申请日：2008-11-25
申请人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager
发明人： Ramin Khoini-Poorfard , Alessandro Piovaccari , Aslamali A. Rafi , Mustafa H. Koroglu , David S. Trager
IPC分类号： H04B1/06
CPC分类号： H03J1/0008 , H03J2200/10 , H03J2200/32
摘要： A receiver (400) includes a tracking bandpass filter (420) and a signal processing circuit (430-480). The tracking bandpass filter (420) has a first input for receiving a radio frequency (RF) signal, and an output, and includes a first portion (731) on a semiconductor die (730), and at least one inductor (721). The at least one inductor (721) is operatively coupled to the first portion of the tracking bandpass filter (420). The signal processing circuit (430-480) has an input coupled to the output of the tracking bandpass filter (420), and an output for providing a processed signal. The semiconductor die (730) and the at least one inductor (721) are integrated into a single multi-chip module (MCM) (710).
摘要翻译： 接收器（400）包括跟踪带通滤波器（420）和信号处理电路（430-480）。 跟踪带通滤波器（420）具有用于接收射频（RF）信号的第一输入和输出，并且包括半导体管芯（730）上的第一部分（731）和至少一个电感器（721）。 至少一个电感器（721）可操作地耦合到跟踪带通滤波器（420）的第一部分。 信号处理电路（430-480）具有耦合到跟踪带通滤波器（420）的输出的输入端和用于提供处理信号的输出端。 半导体管芯（730）和至少一个电感器（721）被集成到单个多芯片模块（MCM）（710）中。
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30.发明授权公开(公告)号：US07904040B2
公开(公告)日：2011-03-08
申请号：US12004006
申请日：2007-12-19
IPC分类号： H04B7/08
CPC分类号： H04N5/4446 , H03D3/006 , H03D3/007 , H03L7/18 , H04H40/90 , H04N5/4401 , H04N5/50 , H04N7/20 , H04N21/4263
摘要： Receiver architectures and associated methods are disclosed that provide initial analog coarse tuning of desired channels within a received signal spectrum, such as a set-top box signal spectrum for satellite communications. These architectures provide significant advantages over prior direct down-conversion (DDC) architectures and low intermediate-frequency (IF) architectures, particularly where two tuners are desired on the same integrated circuit. Rather than using a low-IF frequency or directly converting the desired channel frequency to DC, initial coarse tuning provided by analog coarse tuning circuitry allows for a conversion to a frequency range around DC. This coarse tuning circuitry can be implemented, for example, using a large-step local oscillator (LO) that provides a coarse tune analog mixing signal. Once mixed down, the desired channel may then be fine-tuned through digital processing, such as through the use of a wide-band analog-to-digital converter (ADC) or a narrow-band tunable bandpass ADC.
摘要翻译： 公开了接收机架构和相关方法，其提供接收信号频谱内的期望信道的初始模拟粗调，例如用于卫星通信的机顶盒信号频谱。 这些架构与先前的直接下变频（DDC）架构和低中频（IF）架构相比具有显着的优势，特别是在同一集成电路上需要两个调谐器的情况下。 不是使用低IF频率或直接将期望的信道频率转换为DC，而是由模拟粗调谐电路提供的初始粗调调可以转换到大约DC的频率范围。 该粗调谐电路可以例如使用提供粗调模拟混频信号的大步本地振荡器（LO）来实现。 一旦混合，则可以通过数字处理（例如通过使用宽带模数转换器（ADC）或窄带可调谐带通ADC）来微调所需的信道。
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