公开(公告)号：US09240342B2

公开(公告)日：2016-01-19

申请号：US13944200

申请日：2013-07-17

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Ajey P. Jacob ,  Murat K. Akarvardar ,  Jody Fronheiser ,  Witold P. Maszara

IPC: H01L21/762 ,  H01L29/66 ,  H01L29/78 ,  H01L27/12

CPC classification number: H01L21/32055 ,  H01L21/3105 ,  H01L21/76224 ,  H01L27/1203 ,  H01L29/66628 ,  H01L29/66765 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

Abstract: Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a stable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 104 defects/cm2 or less throughout its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

Abstract translation: 本文公开了用于形成处于稳定或亚稳态的替代翅片材料的各种方法。 在一种情况下，稳定的替换翅片生长到比替换翅片材料的无约束的稳定的临界厚度大的高度，并且其整个高度的缺陷密度为104个缺陷/ cm2或更小。 在另一种情况下，亚稳替代鳍生长到高于替代翅片材料的无约束亚稳临界厚度的高度，并且在其整个高度的至少90％中具有105缺陷/ cm2或更小的缺陷密度。

公开(公告)号：US20150372080A1

公开(公告)日：2015-12-24

申请号：US14839378

申请日：2015-08-28

Applicant: International Business Machines Corporation ,  GLOBALFOUNDRIES Inc. ,  RENESAS ELECTRONICS CORPORATION

Inventor： Murat Kerem Akarvardar ,  Steven John Bentley ,  Kangguo Cheng ,  Bruce B. Doris ,  Jody Fronheiser ,  Ajey Poovannummoottil Jacob ,  Ali Khakifirooz ,  Toshiharu Nagumo

IPC: H01L29/06 ,  H01L27/092

CPC classification number: H01L29/0653 ,  H01L21/76229 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0886 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/785

Abstract: A method of forming a semiconductor structure includes forming a first isolation region between fins of a first group of fins and between fins of a second group of fins. The first a second group of fins are formed in a bulk semiconductor substrate. A second isolation region is formed between the first group of fins and the second group of fins, the second isolation region extends through a portion of the first isolation region such that the first and second isolation regions are in direct contact and a height above the bulk semiconductor substrate of the second isolation region is greater than a height above the bulk semiconductor substrate of the first isolation region.

Abstract translation: 形成半导体结构的方法包括在第一组鳍片的翅片之间以及在第二组鳍片的翅片之间形成第一隔离区域。 第一组翅片形成在体半导体衬底中。 第二隔离区域形成在第一散热片组和第二散热片组之间，第二隔离区域延伸穿过第一隔离区域的一部分，使得第一隔离区域和第二隔离区域直接接触并且高于主体 第二隔离区域的半导体衬底大于第一隔离区域的体半导体衬底上方的高度。

公开(公告)号：US09165837B1

公开(公告)日：2015-10-20

申请号：US14525743

申请日：2014-10-28

Applicant: GLOBALFOUNDRIES Inc.

Inventor： Jody Fronheiser ,  Murat Kerem Akarvardar ,  Ajey P. Jacob ,  Steven Bentley

IPC: H01L21/336 ,  H01L21/00 ,  H01L21/20 ,  H01L21/8238 ,  H01L21/3065 ,  H01L21/762 ,  H01L21/8234

CPC classification number: H01L21/823821 ,  H01L21/302 ,  H01L21/3065 ,  H01L21/3247 ,  H01L21/76224 ,  H01L21/823431

Abstract: Methods of forming a defect free heteroepitaxial replacement fin by annealing the sacrificial Si fin with H2 prior to STI formation are provided. Embodiments include forming a Si fin on a substrate; annealing the Si fin with H2; forming a STI layer around the annealed Si fin; annealing the STI layer; removing a portion of the annealed Si fin by etching, forming a recess; forming a replacement fin in the recess; and recessing the annealed STI layer to expose an active replacement fin.

Abstract translation: 提供了在STI形成之前通过用H 2退火牺牲Si翅片来形成无缺陷异质外延替换翅片的方法。 实施例包括在基板上形成Si翅片; 用H2退火Si翅片; 在退火的Si翅片周围形成STI层; 退火STI层; 通过蚀刻去除退火的Si翅片的一部分，形成凹部; 在凹槽中形成替换翅片; 并使退火的STI层凹陷以暴露活性替换翅片。

公开(公告)号：US20140213037A1

公开(公告)日：2014-07-31

申请号：US13755246

申请日：2013-01-31

Applicant: GLOBALFOUNDRIES, INC.

Inventor： Nicholas LiCausi ,  Jody Fronheiser ,  Errol Todd Ryan

IPC: H01L21/762

CPC classification number: H01L21/76224 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/3105 ,  H01L29/66795

Abstract: Methods are provided for fabricating integrated circuits. In accordance with one embodiment, the method includes forming a portion of a semiconductor substrate at least partially bounded by a confinement isolation material. A liner dielectric is formed overlying the confinement isolation material and is treated to passivate a surface thereof An epitaxial layer of semiconductor material is then grown overlying the portion of semiconductor substrate.

Abstract translation: 提供了用于制造集成电路的方法。 根据一个实施例，该方法包括形成至少部分地由限制隔离材料界定的半导体衬底的一部分。 形成衬垫电介质覆盖在限制隔离材料上，并被处理以钝化其表面。然后，半导体材料的外延层生长在半导体衬底的该部分上。