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    Methods of forming a three-dimensional semiconductor device with a nanowire channel structure
    2.
    发明授权
    Methods of forming a three-dimensional semiconductor device with a nanowire channel structure 有权
    形成具有纳米线通道结构的三维半导体器件的方法

    公开(公告)号：US08728885B1

    公开(公告)日：2014-05-20

    申请号：US13728438

    申请日：2012-12-27

    申请人： GLOBALFOUNDRIES Inc.

    发明人： Daniel T. Pham ,  Jody Fronheiser ,  William J. Taylor, Jr.

    IPC分类号： H01L29/94

    CPC分类号： H01L29/0673 ,  H01L29/42392 ,  H01L29/66545 ,  H01L29/7846 ,  H01L29/78696

    摘要： One method herein includes forming a plurality of spaced-apart trenches that extend at least partially into a semiconducting substrate, wherein the trenches define a fin structure comprised of first and second layers of semiconducting material, wherein the first layer of semiconducting material is selectively etchable relative to the substrate and the second layer of semiconducting material, forming a sacrificial gate structure above the fin, wherein the gate structure includes a gate insulation layer and a gate electrode, forming a sidewall spacer adjacent the gate structure, performing an etching process to remove the sacrificial gate structure, thereby defining a gate cavity, performing at least one selective etching process to selectively remove the first layer of semiconducting material relative to the second layer of semiconducting material within the gate cavity, thereby defining a space between the second semiconducting material and the substrate, and forming a final gate structure in the gate cavity.

    摘要翻译： 这里的一种方法包括形成多个间隔开的沟槽，其至少部分地延伸到半导体衬底中，其中沟槽限定由第一和第二半导体材料层组成的鳍结构，其中第一层半导体材料是相对于可选择地蚀刻的 到所述衬底和所述第二半导体材料层，在所述鳍片之上形成牺牲栅极结构，其中所述栅极结构包括栅极绝缘层和栅电极，形成邻近所述栅极结构的侧壁隔离层，执行蚀刻工艺以去除所述栅极结构 牺牲栅极结构，从而限定栅极腔，执行至少一个选择性蚀刻工艺，以相对于栅极腔内的第二半导体材料层选择性地去除第一半导体材料层，由此限定第二半导体材料与第二半导体材料之间的空间 衬底，并形成最终的门结构 在门洞里。

    METHODS OF FORMING METASTABLE REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE BY PERFORMING A REPLACEMENT GROWTH PROCESS
    4.
    发明申请
    METHODS OF FORMING METASTABLE REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE BY PERFORMING A REPLACEMENT GROWTH PROCESS 审中-公开
    通过执行替代生长过程形成FINFET半导体器件的可替代替代FIS的方法

    公开(公告)号：US20160064250A1

    公开(公告)日：2016-03-03

    申请号：US14931277

    申请日：2015-11-03

    申请人： GLOBALFOUNDRIES Inc.

    发明人： Ajey P. Jacob ,  Murat K. Akarvardar ,  Jody Fronheiser ,  Witold P. Maszara

    IPC分类号： H01L21/3205 ,  H01L21/3105

    CPC分类号： H01L21/32055 ,  H01L21/3105 ,  H01L21/76224 ,  H01L27/1203 ,  H01L29/66628 ,  H01L29/66765 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

    摘要： Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a metastable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

    摘要翻译： 本文公开了用于形成处于稳定或亚稳态的替代翅片材料的各种方法。 在一种情况下，亚稳态替代翅片生长到大于置换翅片材料的无约束稳定的临界厚度的高度，并且在其整个高度的至少90％中具有105缺陷/ cm2或更小的缺陷密度。 在另一种情况下，亚稳替代鳍生长到高于替代翅片材料的无约束亚稳临界厚度的高度，并且在其整个高度的至少90％中具有105缺陷/ cm2或更小的缺陷密度。

    METHODS OF FORMING REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE BY PERFORMING A REPLACEMENT GROWTH PROCESS
    5.
    发明申请
    METHODS OF FORMING REPLACEMENT FINS FOR A FINFET SEMICONDUCTOR DEVICE BY PERFORMING A REPLACEMENT GROWTH PROCESS 有权
    通过执行替代生长过程形成FINFET半导体器件的替代FIS的方法

    公开(公告)号：US20150024573A1

    公开(公告)日：2015-01-22

    申请号：US13944200

    申请日：2013-07-17

    申请人： GLOBALFOUNDRIES Inc.

    发明人： Ajey P. Jacob ,  Murat K. Akarvardar ,  Jody Fronheiser ,  Witold P. Maszara

    IPC分类号： H01L21/762

    CPC分类号： H01L21/32055 ,  H01L21/3105 ,  H01L21/76224 ,  H01L27/1203 ,  H01L29/66628 ,  H01L29/66765 ,  H01L29/7848 ,  H01L29/785 ,  H01L29/7851

    摘要： Various methods are disclosed herein for forming alternative fin materials that are in a stable or metastable condition. In one case, a stable replacement fin is grown to a height that is greater than an unconfined stable critical thickness of the replacement fin material and it has a defect density of 104 defects/cm2 or less throughout its entire height. In another case, a metastable replacement fin is grown to a height that is greater than an unconfined metastable critical thickness of the replacement fin material and it has a defect density of 105 defects/cm2 or less throughout at least 90% of its entire height.

    摘要翻译： 本文公开了用于形成处于稳定或亚稳态的替代翅片材料的各种方法。 在一种情况下，稳定的替换翅片生长到比替换翅片材料的无约束的稳定的临界厚度大的高度，并且其整个高度的缺陷密度为104个缺陷/ cm2或更小。 在另一种情况下，亚稳替代鳍生长到高于替代翅片材料的无约束亚稳临界厚度的高度，并且在其整个高度的至少90％中具有105缺陷/ cm2或更小的缺陷密度。

    Raised source/drain EPI with suppressed lateral EPI overgrowth
    9.
    发明授权
    Raised source/drain EPI with suppressed lateral EPI overgrowth 有权
    提高源/排出EPI，抑制侧向EPI过度生长

    公开(公告)号：US09236452B2

    公开(公告)日：2016-01-12

    申请号：US14286400

    申请日：2014-05-23

    申请人： GLOBALFOUNDRIES Inc.

    发明人： Kwan-Yong Lim ,  Jody Fronheiser ,  Christopher Prindle

    IPC分类号： H01L29/66 ,  H01L29/08

    CPC分类号： H01L29/0847 ,  H01L21/823431 ,  H01L27/0886 ,  H01L29/41791 ,  H01L29/66795 ,  H01L29/785

    摘要： A method of forming raised S/D regions by partial EPI growth with a partial EPI liner therebetween and the resulting device are provided. Embodiments include forming groups of fins extending above a STI layer; forming a gate over the groups of fins; forming a gate spacer on each side of the gate; forming a raised S/D region proximate to each spacer on each fin of the groups of fins, each raised S/D region having a top surface, vertical sidewalls, and an undersurface; forming a liner over and between each raised S/D region; removing the liner from the top surface of each raised S/D region and from in between a group of fins; forming an overgrowth region on the top surface of each raised S/D region; forming an ILD over and between the raised S/D regions; and forming a contact through the ILD, down to the raised S/D regions.

    摘要翻译： 提供通过部分EPI生长形成凸起S / D区域的方法，其中部分EPI衬垫在其间，并且提供所得到的装置。 实施例包括形成在STI层上延伸的翅片组; 在翅片组上形成一个门; 在栅极的每一侧上形成栅极间隔物; 在所述翅片组的每个翅片上形成靠近每个间隔件的凸起S / D区域，每个凸起的S / D区域具有顶表面，垂直侧壁和下表面; 在每个凸起的S / D区域之间和之间形成衬垫; 从每个凸起的S / D区域的顶表面和一组翅片之间移除衬垫; 在每个凸起的S / D区域的上表面上形成过度生长区域; 在升高的S / D区域之间形成ILD; 并通过ILD形成接触，直到升高的S / D区域。

    Methods for fabricating integrated circuits having confined epitaxial growth regions
    10.
    发明授权
    Methods for fabricating integrated circuits having confined epitaxial growth regions 有权
    制造具有有限外延生长区域的集成电路的方法

    公开(公告)号：US08815685B2

    公开(公告)日：2014-08-26

    申请号：US13755246

    申请日：2013-01-31

    申请人： GLOBALFOUNDRIES, Inc.

    发明人： Nicholas LiCausi ,  Jody Fronheiser ,  Errol Todd Ryan

    IPC分类号： H01L21/336 ,  H01L21/762

    CPC分类号： H01L21/76224 ,  H01L21/02532 ,  H01L21/0262 ,  H01L21/02658 ,  H01L21/3105 ,  H01L29/66795

    摘要： Methods are provided for fabricating integrated circuits. In accordance with one embodiment, the method includes forming a portion of a semiconductor substrate at least partially bounded by a confinement isolation material. A liner dielectric is formed overlying the confinement isolation material and is treated to passivate a surface thereof. An epitaxial layer of semiconductor material is then grown overlying the portion of semiconductor substrate.

    摘要翻译： 提供了用于制造集成电路的方法。 根据一个实施例，该方法包括形成至少部分地由限制隔离材料界定的半导体衬底的一部分。 衬垫电介质覆盖在限制隔离材料上，并被处理以钝化其表面。 然后将半导体材料的外延层生长在半导体衬底的一部分上。