Message Parsing Method, Data Transmit End, Data Receive End, and System

    公开(公告)号:US20210385309A1

    公开(公告)日:2021-12-09

    申请号:US17407705

    申请日:2021-08-20

    Abstract: This application provides a message parsing method, a data transmit end, a data receive end, and a system, and pertains to the field of network technologies. The method includes: when creating an XML message, the data transmit end may add a target identifier to the XML message to indicate an independent message block in the XML message, where the independent message block is an independent context-free message block, and then may transmit the XML message to the data receive end; and in a process of receiving the XML message, if it is detected that the target identifier exists in the XML message, the data receive end may capture, from the XML message, the independent message block corresponding to the target identifier, and then parse the captured independent message block.

    Voltage conversion circuit with a bleed circuit

    公开(公告)号:US10680519B2

    公开(公告)日:2020-06-09

    申请号:US16183233

    申请日:2018-11-07

    Abstract: The present disclosure discloses a voltage conversion circuit, including: a first power transistor; a second power transistor, where the second power transistor is cut off when the first power transistor is conductive and is conductive when the first power transistor is cut off; a first energy storage element; a second energy storage element, a bleed module, configured to be coupled to the first power transistor, where when the first power transistor is cut off and a voltage of a source of the first power transistor reaches a source threshold, provide a current path for a current flowing from the source of the first power transistor to the ground. By means of the foregoing, a voltage difference between a drain and the source of the first power transistor can be decreased, thereby reducing a risk of burning out the first power transistor, and avoiding an increase in manufacturing costs.

    CHANNEL CODING/DECODING METHOD FOR DATA EXCHANGE SERVICE, AND DEVICE
    23.
    发明申请
    CHANNEL CODING/DECODING METHOD FOR DATA EXCHANGE SERVICE, AND DEVICE 审中-公开
    用于数据交换服务的信道编码/解码方法和设备

    公开(公告)号:US20160308645A1

    公开(公告)日:2016-10-20

    申请号:US15197373

    申请日:2016-06-29

    CPC classification number: H04L1/0068 H04L1/0041 H04L1/0071 H04W4/70

    Abstract: Embodiments of the present invention provide a channel coding method for a data exchange service, and a device. The method includes: coding source data to generate a first bitstream, where a code rate of a data part of the source data is p, and p is less than ⅓; puncturing the first bitstream to generate a second bitstream; mapping, in an interleaved manner, the second bitstream to q bursts to generate q burst sequences, for modulation, where the second bitstream fully occupies each burst sequence of the q burst sequences, and q is an integer greater than 4; and sending the q modulated burst sequences to a receive end. In the embodiments of the present invention, a code rate of channel coding for a data exchange service is reduced, so that reliability of terminal data transmission can be improved at same power consumption or less power consumption.

    Abstract translation: 本发明的实施例提供了一种用于数据交换服务的信道编码方法和装置。 该方法包括:对源数据进行编码以产生第一比特流,其中源数据的数据部分的码率为p,p小于1/3; 打孔第一比特流以产生第二比特流; 以交织的方式将第二比特流映射到q个突发,以产生用于调制的q个突发序列,其中第二比特流完全占据q个突发序列的每个突发序列,并且q是大于4的整数; 以及将q个调制的脉冲串序列发送到接收端。 在本发明的实施例中,减少了数据交换业务的信道编码的码率,从而可以在相同的功耗或较少的功耗下提高终端数据传输的可靠性。

    DC-DC converter
    24.
    发明授权
    DC-DC converter 有权
    DC-DC转换器

    公开(公告)号:US09312763B2

    公开(公告)日:2016-04-12

    申请号:US14257627

    申请日:2014-04-21

    CPC classification number: H02M3/156 H02M2001/0025

    Abstract: The present invention is applicable to the field of direct current conversion, and provides a DC-DC converter. In the present invention, a DC-DC converter including a triangular wave generation module and a switch control module is adopted. The triangular wave generation module generates a triangular wave signal according to voltages at both ends of an energy storage inductor L1, and the switch control module outputs a control level according to its internally generated clock signal and the triangular wave signal to control a switching operation of a PMOS power tube and an NMOS power tube according to a preset switching frequency.

    Abstract translation: 本发明可应用于直流转换领域,并提供一种DC-DC转换器。 在本发明中,采用包括三角波产生模块和开关控制模块的DC-DC转换器。 三角波产生模块根据能量存储电感器L1两端的电压产生三角波信号,并且开关控制模块根据其内部产生的时钟信号和三角波信号输出控制电平,以控制开关操作 PMOS功率管和NMOS功率管,根据预设的开关频率。

    Hysteretic Control Conversion Circuit and Power Supply System
    25.
    发明申请
    Hysteretic Control Conversion Circuit and Power Supply System 有权
    迟滞控制转换电路和电源系统

    公开(公告)号:US20140035544A1

    公开(公告)日:2014-02-06

    申请号:US14053817

    申请日:2013-10-15

    CPC classification number: H02M3/158

    Abstract: The invention discloses a hysteretic control conversion circuit. The circuit includes a PMOS transistor and an NMOS transistor that are connected in series between a voltage input terminal and a ground terminal, a first voltage divider resistor string connected in series between a voltage output terminal and the ground terminal, a comparator, and a logic controller, where an output terminal of the comparator is connected to an input terminal of the logic controller, and two output terminals of the logic controller are respectively connected to grid electrodes of the PMOS transistor and the NMOS transistor. The hysteretic control conversion circuit also includes: a negative feedback module connected between the voltage output terminal and the input terminal of the comparator, and configured to perform negative feedback control over an output voltage of the hysteretic control conversion circuit and clamp the output voltage to a preset reference voltage.

    Abstract translation: 本发明公开了一种迟滞控制转换电路。 电路包括串联连接在电压输入端和接地端之间的PMOS晶体管和NMOS晶体管,串联连接在电压输出端和接地端之间的第一分压电阻串,比较器和逻辑 控制器,其中比较器的输出端连接到逻辑控制器的输入端,逻辑控制器的两个输出端分别连接到PMOS晶体管和NMOS晶体管的栅电极。 迟滞控制转换电路还包括:负反馈模块,连接在电压输出端和比较器的输入端之间,并被配置为对迟滞控制转换电路的输出电压执行负反馈控制,并将输出电压钳位到 预设参考电压。

    Screen capturing method and electronic device

    公开(公告)号:US12293069B2

    公开(公告)日:2025-05-06

    申请号:US18003873

    申请日:2021-06-10

    Abstract: A screen capturing method includes: In a screen split state, an electronic device displays N applications respectively by using N split screens, where one split screen is configured to display an interface of one application, and N is a positive integer greater than 1; further, the electronic device receives a screen capturing operation for a target split screen, where the target split screen includes at least one split screen; finally, in response to the screen capturing operation, the electronic device displays, in full screen, an interface of an application corresponding to each split screen in the target split screen, and generates a screenshot picture, where the screenshot picture includes a full-displayed interface of the application corresponding to each split screen in the target split screen.

    Message parsing method, data transmit end, data receive end, and system

    公开(公告)号:US11956337B2

    公开(公告)日:2024-04-09

    申请号:US17407705

    申请日:2021-08-20

    CPC classification number: H04L69/22 H04L69/321

    Abstract: This application provides a message parsing method, a data transmit end, a data receive end, and a system, and pertains to the field of network technologies. The method includes: when creating an XML message, the data transmit end may add a target identifier to the XML message to indicate an independent message block in the XML message, where the independent message block is an independent context-free message block, and then may transmit the XML message to the data receive end; and in a process of receiving the XML message, if it is detected that the target identifier exists in the XML message, the data receive end may capture, from the XML message, the independent message block corresponding to the target identifier, and then parse the captured independent message block.

    DC-DC converter
    29.
    发明授权

    公开(公告)号:US11876451B2

    公开(公告)日:2024-01-16

    申请号:US17366405

    申请日:2021-07-02

    CPC classification number: H02M3/158 H02M1/0083 H02M3/07

    Abstract: The present disclosure discloses example DC-DC converters. One example DC-DC converter includes a first capacitor, a second capacitor, a switched capacitor SC circuit, and an inductor circuit. An input end of the SC circuit is coupled to a voltage input end, and an output end of the SC circuit is coupled to a voltage output end. The first capacitor and the second capacitor are sequentially connected in series between the voltage input end and the voltage output end. One end of the inductor circuit is selectively coupled between the first capacitor and the second capacitor or to a ground end, and the other end of the inductor circuit is coupled to the voltage output end.

    Entry Information Processing Method and Apparatus

    公开(公告)号:US20230163996A1

    公开(公告)日:2023-05-25

    申请号:US18156883

    申请日:2023-01-19

    CPC classification number: H04L12/4625 H04L61/5014 H04L12/4641

    Abstract: A system and method for processing dynamic host configuration protocol (DHCP) snooping entry information in a ring network An entry information processing apparatus includes a processor and a non-transitory memory connected to the processor and storing program code for execution by the processor. The program code includes instructions to generate a first packet, where the first packet includes DHCP snooping entry information, the DHCP snooping entry information includes a first internet protocol (IP) address of first user equipment and a first media access control (MAC) address of the first user equipment, and the first user equipment accesses a ring network via a first communication apparatus in which the entry information processing apparatus is used, and send the first packet.

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