Non-transitory computer readable recording medium storing print management program, print management device, print management method, and print system
    21.
    发明授权
    Non-transitory computer readable recording medium storing print management program, print management device, print management method, and print system 有权
    存储打印管理程序,打印管理装置,打印管理方法和打印系统的非暂时计算机可读记录介质

    公开(公告)号:US08711387B2

    公开(公告)日:2014-04-29

    申请号:US13406696

    申请日:2012-02-28

    IPC分类号: G06F3/12 G06K15/00

    摘要: A non-transitory computer readable recording medium that stores a print management program causing a computer to function as a retrieval unit that retrieves information about first functions of an image forming device and information about second functions of plural second devices; and a determination unit that determines whether the second functions of the second devices can process a print job, when the first functions of the image forming device cannot process the print job. Here, the image forming device and the second devices are connected to a print system including the computer. When the determination unit determines that the second functions of the second devices cannot process the print job, the print management program constrains the second functions of the second devices from being utilized.

    摘要翻译: 一种非暂时性计算机可读记录介质,其存储导致计算机用作检索关于图像形成装置的第一功能的信息的检索单元和关于多个第二装置的第二功能的信息的打印管理程序; 以及确定单元,当图像形成装置的第一功能不能处理打印作业时,确定第二装置的第二功能是否可以处理打印作业。 这里,图像形成装置和第二装置连接到包括计算机的打印系统。 当确定单元确定第二设备的第二功能不能处理打印作业时,打印管理程序限制第二设备的第二功能被使用。

    Semiconductor integrated circuit and method for controlling semiconductor integrated circuit
    22.
    发明授权
    Semiconductor integrated circuit and method for controlling semiconductor integrated circuit 有权
    半导体集成电路及半导体集成电路控制方法

    公开(公告)号:US08621262B2

    公开(公告)日:2013-12-31

    申请号:US13619403

    申请日:2012-09-14

    IPC分类号: G06F11/00

    CPC分类号: G06F13/362 G06F15/7807

    摘要: A semiconductor integrated circuit, including a first master circuit, a second master circuit, a first slave circuit assigned to the first master circuit, and determines that an access request signal is sent from the first master circuit when an identification information is a first value, a first bus coupled to the first master circuit, the second master circuit, and the first slave circuit, a bus controller is configured to transmit the access request signal to the first slave circuit via the first bus, a system controller directs the bus controller to substitute the first value for a second value on the identification information of the access request signal received from the second master circuit when the first master circuit is in the deactivated state.

    摘要翻译: 一种半导体集成电路,包括第一主电路,第二主电路,分配给第一主电路的第一从电路,并且当识别信息是第一值时,确定从第一主电路发送访问请求信号, 耦合到第一主电路,第二主电路和第一从电路的第一总线,总线控制器被配置为经由第一总线将访问请求信号发送到第一从电路,系统控制器将总线控制器引导到 当第一主电路处于去激活状态时,将从第二主电路接收的接入请求信号的识别信息替换第二值作为第二值。

    Multiplexing commands from processors to tightly coupled coprocessor upon state based arbitration for coprocessor resources
    23.
    发明授权
    Multiplexing commands from processors to tightly coupled coprocessor upon state based arbitration for coprocessor resources 有权
    在协处理器资源的基于状态的仲裁时,从处理器到紧耦合协处理器的复用命令

    公开(公告)号:US08055882B2

    公开(公告)日:2011-11-08

    申请号:US12175882

    申请日:2008-07-18

    IPC分类号: G06F15/16

    摘要: Disclosed is a multiprocessor apparatus including a plurality of processors connected to a common bus, a co-processor provided in common to the processors, an arbitration circuit that arbitrates contention among the processors with respect to use of a resource in the co-processor through a tightly coupled bus by the processors and a multiplexer coupled to the arbitration circuit, coupled to the processors through a local buses, and coupled to the co-processor through the local buses to transfer the commands received from the respective processors to the co-processor in accordance with a permission signal output by the arbitration circuit.

    摘要翻译: 公开了一种多处理器装置,包括连接到公共总线的多个处理器,与处理器共同提供的协处理器,仲裁电路,用于通过协处理器中的协处理器中的资源的使用来仲裁处理器之间的争用 处理器的紧耦合总线和耦合到仲裁电路的多路复用器,其通过本地总线耦合到处理器,并且通过本地总线耦合到协处理器,以将从各个处理器接收的命令传送到协处理器 根据仲裁电路输出的许可信号。

    Method of cleaning storage case
    24.
    发明授权
    Method of cleaning storage case 有权
    储存盒清洗方法

    公开(公告)号:US07967917B2

    公开(公告)日:2011-06-28

    申请号:US11839626

    申请日:2007-08-16

    IPC分类号: B08B5/02 B08B9/093

    CPC分类号: B08B7/0071 G03F1/66 G03F1/82

    摘要: The present invention provides a method of cleaning a storage case to be used for storing or transporting mask substrates such as photomasks and photomask blanks, semiconductor substrates such as semiconductor wafers, pellicles, or the like. The present invention: facilitates a regular cleaning operation, can be used also for a storage case of a complicated shape, does not require a large scale equipment or an expensive equipment to facilitate an environmental countermeasure, and provides high cleaning effect. The method of cleaning a storage case polluted by adhesion of a foreign substance of an organic material, an ionic foreign substances or an ionic crystal foreign substance physically absorbed, comprises a step of placing the storage case still in air flow of cleaned air or an inert gas in a temperature range from room temperature to 80° C. for desorbing and removing the foreign substance adhered to the storage case.

    摘要翻译: 本发明提供了一种清洁用于存放或传送诸如光掩模和光掩模坯料的掩模基板,诸如半导体晶片,薄膜等半导体基板的存储盒的方法。 本发明:便于定期的清洁操作,也可以用于复杂形状的储存盒,不需要大型设备或昂贵的设备来促进环境对策,并且提供高清洁效果。 清洁被有机材料的异物,物理吸收的离子性异物或离子性异物的附着物污染的储存箱的方法包括将储存箱放置在清洁空气的空气流中或惰性气体的步骤 气体在室温至80℃的温度范围内,用于解吸和除去粘附到储存盒的异物。

    Braking Apparatus for Blind
    25.
    发明申请
    Braking Apparatus for Blind 有权
    盲人制动装置

    公开(公告)号:US20100018655A1

    公开(公告)日:2010-01-28

    申请号:US12518227

    申请日:2007-12-17

    申请人: Hiroyuki Nakajima

    发明人: Hiroyuki Nakajima

    IPC分类号: E06B9/80

    摘要: A braking apparatus for a blind, used to reduce the speed of a shielding member of the blind when it is lifted and lowered, in which weights are stably supported and operated without an increase in the size of the braking apparatus. The braking apparatus has a casing, a rotor rotatably supported with in the casing, and weights adapted to rotate together with the rotor in such a way that they can be in contact with the inner peripheral surface of the casing. A cylindrical shaft portion and weight support portions radially projecting from the peripheral surface of the shaft portion at equal intervals in the circumferential direction are formed on the rotor. One end of each weight is swingably supported by the weight support portion extending over the axial-direction entire length of the weight.

    摘要翻译: 一种用于盲板的制动装置,用于降低盲板的屏蔽构件的升降速度,其中重量被稳定地支撑和操作,而不增加制动装置的尺寸。 制动装置具有壳体,可旋转地支撑在壳体中的转子和适于与转子一起旋转的重物,使得它们能够与壳体的内周面接触。 在转子上形成圆筒状的轴部和从轴部的圆周面沿圆周方向等间隔地突出的配重支承部。 每个重物的一端由重量支撑部分可摆动地支撑,重量支撑部分在整个长度的轴向方向上延伸。

    MULTIPROCESSOR APPARATUS
    26.
    发明申请
    MULTIPROCESSOR APPARATUS 有权
    多处理器设备

    公开(公告)号:US20090024834A1

    公开(公告)日:2009-01-22

    申请号:US12175882

    申请日:2008-07-18

    IPC分类号: G06F15/76 G06F9/02

    摘要: Disclosed is a multiprocessor apparatus including a plurality of processors connected to a common bus, a co-processor provided in common to the processors, and an arbitration circuit that arbitrates contention among the processors with respect to use of a resource in the co-processor through a tightly coupled bus by the processors.

    摘要翻译: 公开了一种多处理器装置,包括连接到公共总线的多个处理器,与处理器共同提供的协处理器,以及仲裁电路,用于根据协处理器中的资源的使用来仲裁处理器之间的争用 处理器的紧耦合总线。

    Method for designing a system LSI
    27.
    发明申请

    公开(公告)号:US20060190909A1

    公开(公告)日:2006-08-24

    申请号:US11399577

    申请日:2006-04-06

    申请人: Hiroyuki Nakajima

    发明人: Hiroyuki Nakajima

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: A method for designing a system LSI includes the step of defining, for each of instructions of the processor, a behavior function description and an instruction description specifying the behavior function description, and the step of synthesizing the instructions by behavior synthesis to define the processor. The behavior function description and the instruction description are separately stored in a database as design resources for the next design of a system LSI. The instruction description is retrieved as accompanied by the associated behavior function description from the database.

    Method for designing a system LSI
    28.
    发明授权

    公开(公告)号:US07065719B2

    公开(公告)日:2006-06-20

    申请号:US10413692

    申请日:2003-04-15

    申请人: Hiroyuki Nakajima

    发明人: Hiroyuki Nakajima

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: A method for designing a system LSI includes the step of defining, for each of instructions of the processor, a behavior function description and an instruction description specifying the behavior function description, and the step of synthesizing the instructions by behavior synthesis to define the processor. The behavior function description and the instruction description are separately stored in a database as design resources for the next design of a system LSI. The instruction description is retrieved as accompanied by the associated behavior function description from the database.

    Optical disc having square information pits arranged in symmetrical
patterns
    29.
    发明授权
    Optical disc having square information pits arranged in symmetrical patterns 失效
    具有以对称图案排列的方形信息凹坑的光盘

    公开(公告)号:US5572508A

    公开(公告)日:1996-11-05

    申请号:US529788

    申请日:1995-09-18

    摘要: An optical disc is provided with a plurality of information units arranged in the circumferential direction on the track, each of which has a square shape, and has a predetermined unit length in the circumferential direction and a predetermined unit length in the radial direction. A plurality of surface deformed portions are formed each in one of the information units respectively and comprises a plurality of surface deformed pieces having substantially the same size. The surface deformed portions have at least M kinds of forms, which are different in directions of M kinds from each other by combinations of the surface deformed pieces. Each of the surface deformed portions has a plane figure form substantially symmetrical with respect to a straight line passing through a center point of the information unit, and each of the surface deformed portions having a predetermined optical height or depth.

    摘要翻译: 在光盘上设置有沿圆周方向排列的多个信息单元,每个信息单元具有正方形形状,并且在圆周方向上具有预定单位长度,并且沿径向具有预定单位长度。 多个表面变形部分分别形成在一个信息单元中,并且包括多个具有基本相同尺寸的表面变形件。 表面变形部分具有至少M种形式,它们通过表面变形片的组合彼此不同于M种的方向。 每个表面变形部分具有相对于通过信息单元的中心点的直线基本对称的平面图形,并且每个表面变形部分具有预定的光学高度或深度。

    Automatic logic designing method and system
    30.
    发明授权
    Automatic logic designing method and system 失效
    自动逻辑设计方法和系统

    公开(公告)号:US5504690A

    公开(公告)日:1996-04-02

    申请号:US108044

    申请日:1993-08-16

    IPC分类号: G06F17/50

    CPC分类号: G06F17/5045

    摘要: An automatic logic designing method and system in which a control table describing a condition and a behavior corresponding to the condition which express the specification of a computer is inputted and processed in a processor so that a logic circuit having no redundancy which can be easily seen by the designer is designed at a high speed. The control table is converted into the logic circuit whose function is expressed by a detailed Boolean expression. In an instance, selector logics are allocated in consideration of the polarity of the logic. A redundancy detection process or a redundancy logic elimination process is executed for the redundancy logics designated by a redundancy indicate file. A signal name which can be easily understood by the logic designer is formed. An implementing system includes an input control table file, a functional structure converting section of a conditional equation and a behavioral structure, a regular logic expanding processing section, and a redundancy logic elimination processing section, so that the logic circuit formed is outputted to a Boolean expression file.

    摘要翻译: 一种自动逻辑设计方法和系统,其中描述与表达计算机的规格的条件相对应的条件和行为的控制表在处理器中被输入和处理,使得不具有冗余的逻辑电路可以容易地被 设计师是高速设计的。 控制表转换为逻辑电路,其功能由详细的布尔表达式表示。 在一种情况下,考虑到逻辑的极性来分配选择器逻辑。 对由冗余指示文件指定的冗余逻辑执行冗余检测处理或冗余逻辑消除处理。 可以形成由逻辑设计者容易理解的信号名称。 实现系统包括输入控制表文件,条件方程式的功能结构转换部分和行为结构,规则逻辑扩展处理部分和冗余逻辑消除处理部分,使得形成的逻辑电路输出到布尔值 表达文件。