公开(公告)号：US08719819B2

公开(公告)日：2014-05-06

申请号：US11173326

申请日：2005-06-30

申请人： Hong Wang ,  John Shen ,  Ed Grochowski ,  James Paul Held ,  Bryant Bigbee ,  Shivnandan D. Kaushik ,  Gautham Chinya ,  Xiang Zou ,  Per Hammarlund ,  Xinmin Tian ,  Anil Aggarwal ,  Scott Dion Rodgers ,  Prashant Sethi ,  Baiju V. Patel ,  Richard Andrew Hankins

发明人： Hong Wang ,  John Shen ,  Ed Grochowski ,  James Paul Held ,  Bryant Bigbee ,  Shivnandan D. Kaushik ,  Gautham Chinya ,  Xiang Zou ,  Per Hammarlund ,  Xinmin Tian ,  Anil Aggarwal ,  Scott Dion Rodgers ,  Prashant Sethi ,  Baiju V. Patel ,  Richard Andrew Hankins

IPC分类号： G06F9/46

CPC分类号： G06F9/3867 ,  G06F9/30003 ,  G06F9/30043 ,  G06F9/3005 ,  G06F9/3009 ,  G06F9/30145 ,  G06F9/3017 ,  G06F9/30174 ,  G06F9/3851 ,  G06F9/4843 ,  G06F9/4881

摘要： In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

摘要翻译： 在一个实施例中，提供了一种方法。 该方法包括响应于在应用级程序的控制下对第二指令定序器执行用户级指令来管理第一指令定序器上的用户级线程。 在第二指令定序器上运行第一用户级线程并且包含一个或多个用户级指令。 第一用户级指令至少具有1）引用一个或多个指令定序器的字段，或者2）使用指向代码执行代码时特定寻址一个或多个指令定序器的代码的指针进行隐式引用。

公开(公告)号：US20070006231A1

公开(公告)日：2007-01-04

申请号：US11173326

申请日：2005-06-30

申请人： Hong Wang ,  John Shen ,  Ed Grochowski ,  James Held ,  Bryant Bigbee ,  Shivnandan Kaushik ,  Gautham Chinya ,  Xiang Zou ,  Per Hammarlund ,  Xinmin Tian ,  Anil Aggarwal ,  Scott Rodgers ,  Prashant Sethi ,  Baiju Patel ,  Richard Hankins

发明人： Hong Wang ,  John Shen ,  Ed Grochowski ,  James Held ,  Bryant Bigbee ,  Shivnandan Kaushik ,  Gautham Chinya ,  Xiang Zou ,  Per Hammarlund ,  Xinmin Tian ,  Anil Aggarwal ,  Scott Rodgers ,  Prashant Sethi ,  Baiju Patel ,  Richard Hankins

IPC分类号： G06F9/46

CPC分类号： G06F9/3867 ,  G06F9/30003 ,  G06F9/30043 ,  G06F9/3005 ,  G06F9/3009 ,  G06F9/30145 ,  G06F9/3017 ,  G06F9/30174 ,  G06F9/3851 ,  G06F9/4843 ,  G06F9/4881

摘要： In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

摘要翻译： 在一个实施例中，提供了一种方法。 该方法包括响应于在应用级程序的控制下对第二指令定序器执行用户级指令来管理第一指令定序器上的用户级线程。 在第二指令定序器上运行第一用户级线程并且包含一个或多个用户级指令。 第一用户级指令至少具有1）引用一个或多个指令定序器的字段，或者2）使用指向代码执行代码时特定寻址一个或多个指令定序器的代码的指针进行隐式引用。

公开(公告)号：US20110067011A1

公开(公告)日：2011-03-17

申请号：US12949630

申请日：2010-11-18

申请人： Hong Wang ,  Perry H. Wang ,  Ross David Weldon ,  Scott M. Ettinger ,  Hideki Saito ,  Milind B. Girkar ,  Steve Shih-wei Liao ,  Mohammad R. Haghighat ,  Xinmin Tian ,  John P. Shen ,  Oren Gershon

发明人： Hong Wang ,  Perry H. Wang ,  Ross David Weldon ,  Scott M. Ettinger ,  Hideki Saito ,  Milind B. Girkar ,  Steve Shih-wei Liao ,  Mohammad R. Haghighat ,  Xinmin Tian ,  John P. Shen ,  Oren Gershon

IPC分类号： G06F9/45

CPC分类号： G06F9/544 ,  G06F9/52

摘要： In one embodiment a thread management method identifies in a main program a set of instructions that can be dynamically activated as speculative precomputation threads. A wait/sleep operation is performed on the speculative precomputation threads between thread creation and activation, and progress of non-speculative threads is gauged through monitoring a set of global variables, allowing the speculative precomputation threads to determine its relative progress with respect to non-speculative threads.

摘要翻译： 在一个实施例中，线程管理方法在主程序中标识可以被动态地激活为推测性预计算线程的一组指令。 在线程创建和激活之间的推测预先计算线程上执行等待/休眠操作，并且通过监视一组全局变量来衡量非推测线程的进度，允许推测性预计算线程确定其相对于非线性的非计算线程的相对进度， 投机线。

公开(公告)号：US20160019067A1

公开(公告)日：2016-01-21

申请号：US14866875

申请日：2015-09-26

申请人： Hong Wang ,  John P. Shen ,  Edward T. Grochowski ,  Richard A. Hankins ,  Gautham N. Chinya ,  Bryant E. Bigbee ,  Shivnandan D. Kaushik ,  Xiang Chris Zou ,  Per Hammarlund ,  Scott Dion Rodgers ,  Xinmin Tian ,  Anil Aggawal ,  Prashant Sethi ,  Baiju V. Patel ,  James P Held

发明人： Hong Wang ,  John P. Shen ,  Edward T. Grochowski ,  Richard A. Hankins ,  Gautham N. Chinya ,  Bryant E. Bigbee ,  Shivnandan D. Kaushik ,  Xiang Chris Zou ,  Per Hammarlund ,  Scott Dion Rodgers ,  Xinmin Tian ,  Anil Aggawal ,  Prashant Sethi ,  Baiju V. Patel ,  James P Held

IPC分类号： G06F9/38 ,  G06F9/30

CPC分类号： G06F9/3867 ,  G06F9/30003 ,  G06F9/30043 ,  G06F9/3005 ,  G06F9/3009 ,  G06F9/30145 ,  G06F9/3017 ,  G06F9/30174 ,  G06F9/3851 ,  G06F9/4843 ,  G06F9/4881

摘要： In an embodiment, a method is provided. The method includes managing user-level threads on a first instruction sequencer in response to executing user-level instructions on a second instruction sequencer that is under control of an application level program. A first user-level thread is run on the second instruction sequencer and contains one or more user level instructions. A first user level instruction has at least 1) a field that makes reference to one or more instruction sequencers or 2) implicitly references with a pointer to code that specifically addresses one or more instruction sequencers when the code is executed.

公开(公告)号：US07941791B2

公开(公告)日：2011-05-10

申请号：US11786920

申请日：2007-04-13

申请人： Perry Wang ,  Jamison Collins ,  Gautham Chinya ,  Hong Jiang ,  Hong Wang ,  Xinmin Tian ,  Guei-Yuan Lueh

发明人： Perry Wang ,  Jamison Collins ,  Gautham Chinya ,  Hong Jiang ,  Hong Wang ,  Xinmin Tian ,  Guei-Yuan Lueh

IPC分类号： G06F9/45

CPC分类号： G06F9/3879 ,  G06F8/447 ,  G06F8/45 ,  G06F8/47 ,  G06F9/3851

摘要： Compiling a source code program for a heterogeneous multi-core processor having a first instruction sequencer, having a first instruction set architecture, an accelerator to the first instruction sequencer, wherein the accelerator comprises a heterogeneous resource with respect to the first instruction sequencer having a second instruction set architecture, the source code program having specified therein a region of source code for the first instruction set architecture of the processor and a region of source code for the second instruction set architecture of the processor.

摘要翻译： 编译具有第一指令定序器的异构多核处理器的源代码程序，第一指令定序器具有第一指令集架构，加速器到第一指令定序器，其中加速器包括关于第一指令定序器的异质资源， 指令集架构，源代码程序在其中指定了用于处理器的第一指令集架构的源代码区域和处理器的第二指令集架构的源代码区域。

公开(公告)号：US20080256330A1

公开(公告)日：2008-10-16

申请号：US11786920

申请日：2007-04-13

申请人： Perry Wang ,  Jamison Collins ,  Gautham Chinya ,  Hong Jiang ,  Hong Wang ,  Xinmin Tian ,  Guei-Yuan Lueh

发明人： Perry Wang ,  Jamison Collins ,  Gautham Chinya ,  Hong Jiang ,  Hong Wang ,  Xinmin Tian ,  Guei-Yuan Lueh

IPC分类号： G06F15/00

CPC分类号： G06F9/3879 ,  G06F8/447 ,  G06F8/45 ,  G06F8/47 ,  G06F9/3851

摘要： Compiling a source code program for a heterogeneous multi-core processor having a first instruction sequencer, having a first instruction set architecture, an accelerator to the first instruction sequencer, wherein the accelerator comprises a heterogeneous resource with respect to the first instruction sequencer having a second instruction set architecture, the source code program having specified therein a region of source code for the first instruction set architecture of the processor and a region of source code for the second instruction set architecture of the processor.

摘要翻译： 编译具有第一指令定序器的异构多核处理器的源代码程序，第一指令定序器具有第一指令集架构，加速器到第一指令定序器，其中加速器包括关于第一指令定序器的异质资源， 指令集架构，源代码程序在其中指定了用于处理器的第一指令集架构的源代码区域和处理器的第二指令集架构的源代码区域。

公开(公告)号：US07882498B2

公开(公告)日：2011-02-01

申请号：US11278329

申请日：2006-03-31

申请人： Guilherme D. Ottoni ,  Xinmin Tian ,  Hong Wang ,  Richard A. Hankins ,  Wei Li ,  John Shen

发明人： Guilherme D. Ottoni ,  Xinmin Tian ,  Hong Wang ,  Richard A. Hankins ,  Wei Li ,  John Shen

IPC分类号： G06F9/45

CPC分类号： G06F8/456 ,  G06F8/314

摘要： Provided are a method, system, and program for parallelizing source code with a compiler. Source code including source code statements is received. The source code statements are processed to determine a dependency of the statements. Multiple groups of statements are determined from the determined dependency of the statements, wherein statements in one group are dependent on one another. At least one directive is inserted in the source code, wherein each directive is associated with one group of statements. Resulting threaded code is generated including the inserted at least one directive. The group of statements to which the directive in the resulting threaded code applies are processed as a separate task. Each group of statements designated by the directive to be processed as a separate task may be processed concurrently with respect to other groups of statements.

摘要翻译： 提供了一种用于将源代码并行化为编译器的方法，系统和程序。 收到包含源代码语句的源代码。 处理源代码语句以确定语句的依赖关系。 根据确定的语句依赖关系确定多组语句，其中一组中的语句彼此依赖。 在源代码中插入至少一个指令，其中每个指令与一组语句相关联。 产生的结果线程代码包括插入的至少一个指令。 生成的线程代码中的指令所适用的语句组被处理为单独的任务。 指定为要作为单独任务处理的指令的每组语句可以与其他语句组并发处理。

公开(公告)号：US07571301B2

公开(公告)日：2009-08-04

申请号：US11395841

申请日：2006-03-31

申请人： Arun Kejariwal ,  Hideki Saito ,  Xinmin Tian ,  Milind Girkar ,  Sanjiv Shah ,  Wei Li ,  Utpal Banerjee

发明人： Arun Kejariwal ,  Hideki Saito ,  Xinmin Tian ,  Milind Girkar ,  Sanjiv Shah ,  Wei Li ,  Utpal Banerjee

IPC分类号： G06F9/45 ,  G06F9/52

CPC分类号： G06F9/3009 ,  G06F8/458 ,  G06F9/30087 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/3851 ,  G06F9/3855 ,  G06F9/3857 ,  G06F9/3891

摘要： A method for improving parallel processing of computer programs. DOACROSS loops and similar code are identified and parallelized using a post-wait control structure. The post-wait control structure may be implemented to include any one of a single counter to enforce an order of execution, an array to track code completion that is indexed by a modulus of a positive integer number, and/or a set of arrays to track a last code completed by a thread and a current code being executed by a thread.

摘要翻译： 一种改进计算机程序并行处理的方法。 DOACROSS循环和类似代码使用后等待控制结构进行标识和并行化。 后等待控制结构可以被实现为包括执行执行顺序的单个计数器中的任何一个，用于跟踪由正整数的模数索引的代码完成的数组，和/或一组数组 跟踪由线程完成的最后一个代码以及由线程执行的当前代码。

公开(公告)号：US20070234326A1

公开(公告)日：2007-10-04

申请号：US11395841

申请日：2006-03-31

申请人： Arun Kejariwal ,  Hideki Saito ,  Xinmin Tian ,  Milind Girkar ,  Sanjiv Shah ,  Wei Li ,  Utpal Banerjee

发明人： Arun Kejariwal ,  Hideki Saito ,  Xinmin Tian ,  Milind Girkar ,  Sanjiv Shah ,  Wei Li ,  Utpal Banerjee

IPC分类号： G06F9/45

CPC分类号： G06F9/3009 ,  G06F8/458 ,  G06F9/30087 ,  G06F9/3836 ,  G06F9/3838 ,  G06F9/3851 ,  G06F9/3855 ,  G06F9/3857 ,  G06F9/3891

摘要： A method for improving parallel processing of computer programs. DOACROSS loops and similar code are identified and parallelized using a post-wait control structure. The post-wait control structure may be implemented to include any one of a single counter to enforce an order of execution, an array to track code completion that is indexed by a modulus of a positive integer number, and/or a set of arrays to track a last code completed by a thread and a current code being executed by a thread.

摘要翻译： 一种改进计算机程序并行处理的方法。 DOACROSS循环和类似代码使用后等待控制结构进行标识和并行化。 后等待控制结构可以被实现为包括执行执行顺序的单个计数器中的任何一个，用于跟踪由正整数的模数索引的代码完成的数组，和/或一组数组 跟踪由线程完成的最后一个代码以及由线程执行的当前代码。

公开(公告)号：US20060288334A1

公开(公告)日：2006-12-21

申请号：US11157441

申请日：2005-06-21

申请人： Xinmin Tian ,  Milind Girkar

发明人： Xinmin Tian ,  Milind Girkar

IPC分类号： G06F9/44

CPC分类号： G06F8/4441

摘要： Techniques for execution-driven loop splitting and load-safe code hosting are provided. Compiled code includes statements associated with an original loop and statements associated with an alternative loop. The alternative loop reproduces the original loop except for conditional load-safe invariant expressions that appeared in the original loop and that are separated out of the alternative loop. During processing, once the conditional load-safe invariant expressions are computed and referenced for a first time within the original loop, processing dynamically switches to the alternative loop where the conditional load-safe invariant expressions are computed outside of the alternative loop and referenced from within the alternative loop.