摘要:
A gate driver and a liquid crystal display using the same are provided. The gate driver includes a scan signal generating unit and a compensation unit. The scan signal generating unit has a plurality of output channels, and is used for sequentially outputting a scan signal through the output channels according to a basic clock and a start pulse. The compensation unit is coupled to the scan signal generating unit, and used for compensating the total resistance of each of the output channels, and sequentially receiving and transmitting the scan signal to a display panel.
摘要:
A source-driving circuit comprises a plurality of first and second data-outputting units, a first and a second charge-sharing units and a charge-sharing switch circuit. The first and second data-outputting units have corresponding first and second output terminals respectively for outputting data signals with a first polarity and a second polarity. The first and second charge-sharing units comprise a plurality of first and second switches respectively. Each first switch is electrically connected between each two first output terminals and each two second output terminals. Each second switch is electrically connected between one of the first outputting terminals and a corresponding one of the second outputting terminals. A charge-sharing switch circuit is electrically connected to the first and second charge-sharing units for outputting a switch signal to the first and second charge-sharing units according to a polarity signal, so as to determine the on/off statuses of the first and second switches.
摘要:
A gate pulse modulating circuit includes a timing controller capable of generating an output enable signal and a plurality of timing control signals; a high gate voltage generating unit, electrically connected to the timing controller for receiving the timing control signals, capable of generating a high gate voltage with a waveform including a plurality of cutting edges in response to the timing control signals; a low gate voltage generating unit capable of generating a low gate voltage; and a gate driver, electrically connected to the timing controller for receiving the output enable signal and the high gate voltage generating unit for receiving the high gate voltage and the low gate voltage generating unit for receiving the low gate voltage, capable of generating a plurality of gate pulses in response to a plurality of enable periods of the output enable signal; wherein a waveform of the gate pulses includes a plurality of cutting edges.
摘要:
An exemplary gate output control method includes the following steps: providing a gate control signal; using an angling control signal to angling modulate the gate control signal so as to generate a modulated gate control signal; and supplying the modulated gate control signal to a first integrated gate driver circuit and a second integrated gate driver circuit, to sequentially control the gate outputs of the first integrated gate driver circuit and the second integrated gate driver circuit. A duty ratio used by the angling control signal at the time of modulating the gate control signal to generate the modulated gate control signal for the first integrated gate driver circuit is different from another duty ratio used by the angling control signal at the time of modulating the gate control signal to generate the modulated gate control signal for the second integrated gate driver circuit.
摘要:
A liquid crystal display includes a reference voltage generator, a voltage selector, a timing controller, a voltage level shifter, a gate driving circuit and a pixel array. The reference voltage generator is employed to provide a first high reference voltage and a second high reference voltage. The voltage selector is utilized for selecting either the first high reference voltage or the second high reference voltage as a high reference voltage. The timing controller functions to provide a scan control signal. The voltage level shifter generates a preliminary driving signal according to the scan control signal and the high reference voltages. The gate driving circuit provides plural gate signals according to the preliminary driving signal. The pixel array is for displaying images according to the gate signals.
摘要:
By following properties that there is coupled noise, which is coupled from a display panel, within at least one common voltage used on the display panel, the at least one common voltage is fed-back into a pixel electrode driving module, and driving voltages are generated accordingly, so that the generated driving voltages carry noises closes to coupled noises of the display panel. As a result, while the driving voltages carrying noises from the at least one common voltage, the pixel electrode driving module is capable of driving a corresponding pixel electrode with a stable voltage difference, and thereby capable of relieving horizontal crosstalk and raising a display quality of the display panel.
摘要:
By following properties that there is coupled noise, which is coupled from a display panel, within at least one common voltage used on the display panel, the at least one common voltage is fed-back into a pixel electrode driving module, and driving voltages are generated accordingly, so that the generated driving voltages carry noises closes to coupled noises of the display panel. As a result, while the driving voltages carrying noises from the at least one common voltage, the pixel electrode driving module is capable of driving a corresponding pixel electrode with a stable voltage difference, and thereby capable of relieving horizontal crosstalk and raising a display quality of the display panel.
摘要:
A polarity-reversible dimming controller having function of switching light source has a power supply module and a dimming control module. The dimming control module receives an external PWM dimming signal to control a feedback signal of the power supply module so as to dim or power on/off an LED lamp. The dimming control module has an output current switching circuit, a switch control circuit and a dimming control circuit. The output current switching circuit performs a PWM control over a current outputted from the power supply module by using the external PWM dimming signal to maintain chromacity of the LED lamp as a constant. The switch control circuit turns off the PWM controller to enter a standby mode for saving power once the PWM dimming signal exceeds a threshold value. As a full-wave rectification is performed on the PWM dimming signal, the polarity match issue upon assembling can be disregarded.
摘要:
An LCD panel including a liquid crystal cell array, gate driving integrated circuits (ICs), first source driving ICs, second source driving ICs and a timing control circuit is provided. The liquid crystal cell array has a first display area and a second display area. The first and the second source driving ICs are electrically connected with the first and the second display areas, respectively, while the timing control circuit is electrically connected with the source and the gate driving ICs. The LCD panel is driven by writing data into the first display area through the first source driving ICs via a first receiving/transmitting mode and writing data into the second display area through the second source driving ICs via a second receiving/transmitting mode. The first data receiving/transmitting mode is different from the second receiving/transmitting mode.
摘要:
The present invention relates to a method to control the nucleation and transverse motion of 180° inverted domains in ferroelectric nonlinear crystals. It includes a process composing of a high temperature oxidation of the first metal layer and a pulsed field poling of the second electrodes. The main object of present invention is to provide domain inversion of ferroelectric nonlinear crystals with field control the nucleation and transverse motion of inverted domains and two-dimension nonlinear photonic crystals for time-domain multiple-wave simultaneous lasers and space filter function. Another object of present invention is to provide space-charge effect for screened edge field beneath the metal electrode, The other object of present invention is to provide the constraint of inverted domain nucleation in the oxidized electrode for arbitrarily geometrical form of 2D ferroelectric lattice structure.