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公开(公告)号:US11469953B2
公开(公告)日:2022-10-11
申请号:US15716890
申请日:2017-09-27
Applicant: Intel Corporation
Inventor: John J. Browne , Timothy Verrall , Maryam Tahhan , Michael J. McGrath , Sean Harte , Kevin Devey , Jonathan Kenny , Christopher MacNamara
IPC: H04L41/0873 , H04L41/0806 , H04L41/0823 , H04L41/08 , H04L41/0896 , H04L41/50
Abstract: A computing apparatus, including: a hardware platform; and an interworking broker function (IBF) hosted on the hardware platform, the IBF including a translation driver (TD) associated with a legacy network appliance lacking native interoperability with an orchestrator, the IBF configured to: receive from the orchestrator a network function provisioning or configuration command for the legacy network appliance; operate the TD to translate the command to a format consumable by the legacy network appliance; and forward the command to the legacy network appliance.
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公开(公告)号:US11425111B2
公开(公告)日:2022-08-23
申请号:US16683410
申请日:2019-11-14
Applicant: Intel Corporation
Inventor: Ned M. Smith , John J. Browne , Kapil Sood , Francesc Guim Bernat , Kshitij Arun Doshi , Rajesh Poornachandran , Tarun Viswanathan , Manish Dave
IPC: H04L9/40 , H04L41/5003 , H04W12/06
Abstract: Various approaches for implementing attestation using an attestation token are described. In an edge computing system deployment, an edge computing device includes an attestable feature (e.g., resource, service, entity, property, etc.) which is accessible from use of an attestation token, by the operations of: obtaining a first instance of a token that provides proof of attestation for an accessible feature of the edge computing device, with the token including data to indicate trust level designations for the feature as attested by an attestation provider; receiving, from a prospective user of the feature, a request to use the feature and a second instance of the token, with the second instance of the token originating from the attestation provider; and providing access to the feature based on a verification of the instances of the token, by using the verification to confirm attestation of the trust level designations for the feature.
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公开(公告)号:US20220006884A1
公开(公告)日:2022-01-06
申请号:US17477062
申请日:2021-09-16
Applicant: Intel Corporation
Inventor: John J. Browne , Chris M. MacNamara , Declan W. Doherty , Konstantin Ananyev
Abstract: Techniques for reassembling fragmented datagrams are disclosed. Packets may be received and classified. Packets of a fragmented datagram may be stored for later reassembly. In the illustrative embodiment, a datagram is reassembled based on an identified class of service associated with the datagram. Additionally or alternatively, in the illustrative embodiment, a replay window of a replay attack detector may be tuned based on hardware performance of a compute device.
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公开(公告)号:US11212085B2
公开(公告)日:2021-12-28
申请号:US16368982
申请日:2019-03-29
Applicant: Intel Corporation
Inventor: Timothy Verrall , Thomas Willhalm , Francesc Guim Bernat , Karthik Kumar , Ned M. Smith , Rajesh Poornachandran , Kapil Sood , Tarun Viswanathan , John J. Browne , Patrick Kutch
IPC: H04L9/08
Abstract: Technologies for accelerated key caching in an edge hierarchy include multiple edge appliance devices organized in tiers. An edge appliance device receives a request for a key, such as a private key. The edge appliance device determines whether the key is included in a local key cache and, if not, requests the key from an edge appliance device included in an inner tier of the edge hierarchy. The edge appliance device may request the key from an edge appliance device included in a peer tier of the edge hierarchy. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys in the key cache for eviction. The edge appliance device may activate per-tenant accelerated logic to identify one or more keys for pre-fetching. Those functions of the edge appliance device may be performed by an accelerator such as an FPGA. Other embodiments are described and claimed.
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公开(公告)号:US11122129B2
公开(公告)日:2021-09-14
申请号:US15396441
申请日:2016-12-31
Applicant: Intel Corporation
Inventor: Ben-Zion Friedman , Eliezer Tamir , John J. Browne , Stephen Thomas Palermo
IPC: H04L29/08 , H04L12/46 , H04L12/24 , H04L12/14 , H04L12/403 , H04L29/06 , H04M15/00 , H04L12/803 , H04W4/24
Abstract: There is disclosed in an example, a computer-implemented method of providing network function virtualization orchestration (NFVO), including: determining that a first virtual network function (VNF) instance, providing a virtual service appliance on a virtual network, is to be migrated; provisioning a second VNF instance of the virtual service appliance; cloning configuration data from the first VNF to the second VNF; starting the second VNF without copying traffic data; and halting the first VNF. There is also disclosed an apparatus for performing the method, and a computer-readable medium having instructions for performing the method.
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公开(公告)号:US20210224128A1
公开(公告)日:2021-07-22
申请号:US17134056
申请日:2020-12-24
Applicant: Intel Corporation
Inventor: Chris M. MacNamara , John J. Browne , Amruta Misra , Niall C. Power , Dave Cremins , Tomasz Kantecki , Paul Hough , Killian Muldoon
IPC: G06F9/50
Abstract: Techniques for managing workloads in processor cores are disclosed. High priority or mission critical workloads may be assigned to processor cores of a processor. When a power limited throttling condition is met, the processor may throttle some of its cores while not throttling the cores with the high priority or mission critical workloads assigned to it. Such an approach can ensure that mission critical workloads continue even upon throttling of the processor cores.
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公开(公告)号:US20190097984A1
公开(公告)日:2019-03-28
申请号:US15715569
申请日:2017-09-26
Applicant: INTEL CORPORATION
Inventor: John J. Browne , Chris Macnamara , Namakkal N. Venkatesan , Tomasz Kantecki , Declan W. Doherty
IPC: H04L29/06 , H04L12/801
Abstract: Techniques and apparatuses for processing data unit are described. In one embodiment, for example, an apparatus for networking may include at least one memory, logic, at least a portion of the logic comprised in hardware coupled to the at least one memory, the logic to access an encrypted packet having an encrypted portion, determine at least one flow control segment of the encrypted portion, decrypt the at least one flow control segment to generate a partially-decrypted packet comprising a decrypted at least one flow control segment and an encrypted remainder portion, the remainder portion comprising a portion of the encrypted packet that does not include the decrypted at least one flow control segment, access process information in the decrypted at least one flow control segment, and process the partially-decrypted packet according to the process information. Other embodiments are described and claimed.
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公开(公告)号:US10225183B2
公开(公告)日:2019-03-05
申请号:US15170138
申请日:2016-06-01
Applicant: Intel Corporation
Inventor: Ronen Chayat , Andrey Chilikin , John J. Browne
IPC: H04L12/28 , H04L12/721
Abstract: In one embodiment, a system comprises a network interface controller to determine context information associated with a data packet. The network interface controller may select a receive descriptor profile from a plurality of receive descriptor profiles based upon a first portion of the context information and build a receive descriptor for the data packet based upon a second portion of the context information and the selected receive descriptor profile.
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公开(公告)号:US20180331960A1
公开(公告)日:2018-11-15
申请号:US15594838
申请日:2017-05-15
Applicant: Intel Corporation
Inventor: John J. Browne , Chris MacNamara , Ronen Chayat
IPC: H04L12/851 , H04L29/08 , H04L29/06
CPC classification number: H04L47/2441 , H04L47/11 , H04L47/2433 , H04L47/32 , H04L63/0209 , H04L67/322
Abstract: A fabric interface, including: an ingress port to receive incoming network traffic; a host interface to forward the incoming network traffic to a host; and a virtualization-aware overload protection engine including: an overload detector to detect an overload condition on the incoming network traffic; a packet inspector to inspect packets of the incoming network traffic; and a prioritizer to identify low priority packets to be dropped, and high priority packets to be forwarded to the host.
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公开(公告)号:US20180275893A1
公开(公告)日:2018-09-27
申请号:US15465247
申请日:2017-03-21
Applicant: Intel Corporation
Inventor: Hang T. Nguyen , Stephen T. Palermo , John J. Browne , Chris MacNamara , Pradeepsunder Ganesh
IPC: G06F3/06
CPC classification number: G06F3/0616 , G06F3/0647 , G06F11/008 , G06F11/20 , G06F11/203 , G06F11/2041 , G06F11/2043 , G06F11/2046
Abstract: Discussed herein are component redundancy systems, devices, and methods. A method to transfer a workload from a first component to a second component of a same device may include monitoring a wear indicator associated with the first component, and in response to an indication that the first component is stressed based on the wear indicator, transferring a workload of the first component to the second component.
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