公开(公告)号：US20150039805A1

公开(公告)日：2015-02-05

申请号：US13957604

申请日：2013-08-02

Applicant: Infineon Technologies AG

Inventor： Ulrich Backhausen ,  Thomas Kern ,  Thomas Nirschl ,  Jens Rosenbusch ,  Xiangting Bi ,  Edvin Paparisto

IPC: G06F12/02

CPC classification number: G06F12/0246 ,  G06F11/1048 ,  G06F12/0238 ,  G06F12/0292 ,  G06F2212/1032 ,  G06F2212/7201 ,  G06F2212/7207 ,  G11C2029/1806

Abstract: The disclosure relates to an electronic memory system, and more specifically, to a system to emulate an electrically erasable programmable read-only memory, and a method to emulate an electrically erasable programmable read-only memory. According to an embodiment of the disclosure, a system to emulate an electrically erasable programmable read-only memory is provided, the system including a first memory section and a second memory section, wherein the first memory section comprises a plurality of storage locations configured to store data partitioned into a plurality of data segments and wherein the second memory section is configured to store information mapping a physical address of a data segment stored in the first memory section to a logical address of the data segment.

Abstract translation: 本公开涉及一种电子存储器系统，更具体地，涉及一种用于模拟电可擦除可编程只读存储器的系统，以及用于模拟电可擦除可编程只读存储器的方法。 根据本公开的实施例，提供了一种用于模拟电可擦除可编程只读存储器的系统，所述系统包括第一存储器部分和第二存储器部分，其中第一存储器部分包括多个存储位置，其被配置为存储 数据被分割成多个数据段，并且其中第二存储器部分被配置为存储将存储在第一存储器部分中的数据段的物理地址映射到数据段的逻辑地址的信息。

公开(公告)号：US20140153348A1

公开(公告)日：2014-06-05

申请号：US13690299

申请日：2012-11-30

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Thomas Nirschl ,  Jan Otterstedt ,  Alexander Duch

IPC: G11C7/00

CPC classification number: G11C7/00 ,  G11C16/0425 ,  G11C16/3427 ,  G11C16/349

Abstract: A method of operating an integrated circuit includes determining at least one characteristic of at least one memory cell and conducting an operation for the at least one memory cell, wherein based on the at least one characteristic determined a disturbance for at least one additional memory cell is adjusted.

Abstract translation: 操作集成电路的方法包括确定至少一个存储器单元的至少一个特性并对至少一个存储器单元进行操作，其中基于所确定的至少一个特征来确定至少一个附加存储器单元的干扰 调整。

公开(公告)号：US20140146618A1

公开(公告)日：2014-05-29

申请号：US13685737

申请日：2012-11-27

Applicant: INFINEON TECHNOLOGIES AG

Inventor： Thomas Nirschl ,  Christoph Roll ,  Philipp Hofter

IPC: G11C7/10 ,  G11C5/14

CPC classification number: G11C5/14 ,  G11C7/02 ,  G11C8/08 ,  G11C16/0483 ,  G11C16/08 ,  G11C16/12

Abstract: A circuit arrangement, having a plurality of electronic components; a plurality of first access lines and second access lines, wherein each electronic component is coupled with at least one first access line and at least one second access line; an access controller configured to control an access to at least one electronic component of the plurality of electronic components via the at least one first access line and the at least one second access line; a bias circuit configured to provide a defined potential to at least one of the first access lines, wherein the bias circuit is configured, during an access to an electronic component via one selected first access line of the plurality of first access lines, to provide the defined potential to one or two first access lines of the plurality of first access lines, wherein the one or two first access lines are arranged adjacent to the selected first access line, and, wherein during the access to the electronic component, the potentials of the first access lines of the plurality of first access lines other than the selected first access line and the one or two first access lines arranged adjacent to the selected first access line are floating.

Abstract translation: 一种电路装置，具有多个电子部件; 多个第一接入线路和第二接入线路，其中每个电子部件与至少一个第一接入线路和至少一个第二接入线路耦合; 访问控制器，被配置为经由所述至少一个第一接入线路和所述至少一个第二接入线路来控制对所述多个电子部件中的至少一个电子部件的访问; 偏置电路，被配置为：在通过所述多个第一接入线路中的所选择的第一接入线路访问电子部件期间，为所述第一接入线路中的至少一个提供限定的电位，其中所述偏置电路被配置， 所述多个第一接入线中的一个或两个第一接入线的限定电位，其中所述一个或两个第一接入线被布置为与所选择的第一接入线相邻，并且其中在所述电子部件的接入期间， 除了所选择的第一访问线路之外的多个第一访问线路中的第一接入线路和与所选择的第一接入线路相邻布置的一个或两个第一接入线路是浮动的。