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    Resistive memory transition monitoring
    2.
    发明授权
    Resistive memory transition monitoring 有权

    公开(公告)号：US10311955B2

    公开(公告)日：2019-06-04

    申请号：US16058552

    申请日：2018-08-08

    Applicant: Infineon Technologies AG

    Inventor： Ulrich Backhausen ,  Giacomo Curatolo ,  Jens Rosenbusch

    IPC: G11C11/00 ,  G11C13/00 ,  G01R31/12 ,  G01R31/14 ,  G11C29/02 ,  G11C29/50

    Abstract: A method for monitoring a resistive memory having an array of cells coupled between respective bitlines and respective wordlines. The method includes determining, by a current determining circuit, a cell current and a cell current change rate of at least one of the cells; determining, by a control circuit, whether the cell current change rate is outside of a cell current change rate predefined range; performing, by the control circuit, a predetermined action if the control circuit determination is positive; and storing, in a memory, the determined cell current at predetermined times, and to store the determined cell current change rate.

    Marker Programming in Non-Volatile Memories
    4.
    发明申请
    Marker Programming in Non-Volatile Memories 有权
    非易失性存储器中的标记编程

    公开(公告)号：US20150347227A1

    公开(公告)日：2015-12-03

    申请号：US14289311

    申请日：2014-05-28

    Applicant: Infineon Technologies AG

    Inventor： Thomas Rabenalt ,  Ulrich Backhausen ,  Thomas Kern ,  Michael Goessel

    IPC: G06F11/10 ,  G11C29/52

    CPC classification number: G06F11/1068 ,  G06F3/0619 ,  G06F3/064 ,  G06F3/0679 ,  G06F11/1012 ,  G11C16/10 ,  G11C16/26 ,  G11C29/52 ,  G11C2029/0411 ,  H03M13/13

    Abstract: A method for accessing a non-volatile memory is presented. The method comprises reading a first memory region of the non-volatile memory and ascertaining whether the first memory region contains a predetermined data pattern. The predetermined data pattern has no influence on resulting error correcting data determined for at least the first memory region. The method also comprises evaluating a data status for a second memory region of the non-volatile memory on the basis of a presence of the predetermined data pattern in the first memory region. A corresponding memory controller is also disclosed.

    Abstract translation: 提出了一种访问非易失性存储器的方法。 该方法包括读取非易失性存储器的第一存储器区域并确定第一存储器区域是否包含预定的数据模式。 所述预定数据模式对至少所述第一存储器区域确定的所得到的纠错数据没有影响。 该方法还包括基于第一存储器区域中预定数据模式的存在来评估非易失性存储器的第二存储器区域的数据状态。 还公开了相应的存储器控​​制器。

    DATA PROCESSING DEVICE
    6.
    发明公开
    DATA PROCESSING DEVICE 审中-公开

    公开(公告)号：US20230281117A1

    公开(公告)日：2023-09-07

    申请号：US18177934

    申请日：2023-03-03

    Applicant: Infineon Technologies AG

    Inventor： Ulrich Backhausen ,  Julie Henzler ,  Thomas Rabenalt

    IPC: G06F12/02

    CPC classification number: G06F12/0246

    Abstract: A method for dynamically activating a plurality of memory banks by way of a plurality of memory controllers in a chip, each of the memory banks being able to be read and written to independently of the other memory banks and each of the memory banks being able to be activatable by multiple of the plurality of memory controllers in each case. The method includes receiving information about an operating state of the chip, dynamically producing assignments of memory controllers to the memory banks based on the operating state of the chip, and activating the memory banks by way of the memory controllers in accordance with the produced assignments.

    System and method to emulate an electrically erasable programmable read-only memory
    10.
    发明授权
    System and method to emulate an electrically erasable programmable read-only memory 有权
    用于模拟电可擦除可编程只读存储器的系统和方法

    公开(公告)号：US09569354B2

    公开(公告)日：2017-02-14

    申请号：US13957604

    申请日：2013-08-02

    Applicant: Infineon Technologies AG

    Inventor： Ulrich Backhausen ,  Thomas Kern ,  Thomas Nirschl ,  Jens Rosenbusch ,  Xiangting Bi ,  Edvin Paparisto

    IPC: G06F12/02 ,  G06F11/10 ,  G11C29/18

    CPC classification number: G06F12/0246 ,  G06F11/1048 ,  G06F12/0238 ,  G06F12/0292 ,  G06F2212/1032 ,  G06F2212/7201 ,  G06F2212/7207 ,  G11C2029/1806

    Abstract: The disclosure relates to an electronic memory system, and more specifically, to a system to emulate an electrically erasable programmable read-only memory, and a method to emulate an electrically erasable programmable read-only memory. According to an embodiment of the disclosure, a system to emulate an electrically erasable programmable read-only memory is provided, the system including a first memory section and a second memory section, wherein the first memory section comprises a plurality of storage locations configured to store data partitioned into a plurality of data segments and wherein the second memory section is configured to store information mapping a physical address of a data segment stored in the first memory section to a logical address of the data segment.

    Abstract translation: 本公开涉及一种电子存储器系统，更具体地，涉及一种用于模拟电可擦除可编程只读存储器的系统，以及用于模拟电可擦除可编程只读存储器的方法。 根据本公开的实施例，提供了一种用于模拟电可擦除可编程只读存储器的系统，所述系统包括第一存储器部分和第二存储器部分，其中第一存储器部分包括多个存储位置，其被配置为存储 数据被分割成多个数据段，并且其中第二存储器部分被配置为存储将存储在第一存储器部分中的数据段的物理地址映射到数据段的逻辑地址的信息。

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