公开(公告)号：US20250112186A1

公开(公告)日：2025-04-03

申请号：US18374574

申请日：2023-09-28

Applicant: Intel Corporation

Inventor： Feras Eid ,  Adel Elsherbini ,  Thomas Sounart ,  Kimin Jun ,  Wenhao Li

IPC: H01L23/00

Abstract: A surface of at least one of an integrated circuit (IC) die structure or a substrate structure to which the IC die structure is to be bonded include a biphilic region suitable for liquid droplet confinement and droplet-based fine alignment of the IC die structure to the substrate structure. A biphilic region may include an inner region surrounded by bonding regions, or between an adjacent pair of bonding regions. The inner region may improve fine alignment, particularly if there is a significant amount of tilt between a bonding surface of the IC die structure and a bonding surface of the substrate structure during placement. The inner region may, for example, facilitate the confinement of two or more droplets on the bonding regions. Inner or outer regions of a biphilic structure may be segmented or contiguous and intersecting IC die edges may also be non-orthogonal.

公开(公告)号：US20250112181A1

公开(公告)日：2025-04-03

申请号：US18374522

申请日：2023-09-28

Applicant: Intel Corporation

Inventor： Feras Eid ,  Yi Shi ,  Kimin Jun ,  Adel Elsherbini ,  Thomas Sounart ,  Wenhao Li ,  Xavier Brun

IPC: H01L23/00 ,  H01L23/367 ,  H01L25/065

Abstract: Hybrid bonded die stacks, related apparatuses, systems, and methods of fabrication are disclosed. An integrated circuit (IC) die and a surface of a substrate each include hybrid bonding regions surrounded by hydrophobic structures. The hydrophobic structures include non-vertical inward sloping sidewalls or similar features to contain a liquid droplet that is applied to the die or substrate hybrid bonding region. After the hybrid bonding regions are brought together, capillary forces cause the die to self-align, and a hybrid bond is formed by evaporating the liquid and subsequent anneal. IC structures including the IC die and portions of the substrate are segmented and assembled.

公开(公告)号：US20250112173A1

公开(公告)日：2025-04-03

申请号：US18374577

申请日：2023-09-28

Applicant: Intel Corporation

Inventor： Kimin Jun ,  Feras Eid ,  Adel Elsherbini ,  Thomas Sounart ,  Yi Shi ,  Wenhao Li

IPC: H01L23/00 ,  H01L23/31

Abstract: A surface of an integrated circuit (IC) die structure and a substrate to which the IC die structure is to be bonded include biphilic regions suitable for liquid droplet formation and droplet-based fine alignment of the IC die structure to the substrate. To ensure warpage of the IC die structure does not interfere with droplet-based fine alignment process, an IC die structure of greater thickness is aligned to the substrate and thickness of the IC die structure subsequently reduced. In some embodiments, a back side of the IC die structure is polished back post attachment. In some alternative embodiments, the IC die structure includes sacrificial die-level carrier is removed after fine alignment and/or bonding.

公开(公告)号：US20240063091A1

公开(公告)日：2024-02-22

申请号：US17891735

申请日：2022-08-19

Applicant: Intel Corporation

Inventor： Adel Elsherbini ,  Feras Eid ,  Scot Kellar ,  Yoshihiro Tomita ,  Rajiv Mongia ,  Kimin Jun ,  Shawna Liff ,  Wenhao Li ,  Johanna Swan ,  Bhaskar Jyoti Krishnatreya ,  Debendra Mallik ,  Krishna Vasanth Valavala ,  Lei Jiang ,  Xavier Brun ,  Mohammad Enamul Kabir ,  Haris Khan Niazi ,  Jiraporn Seangatith ,  Thomas Sounart

IPC: H01L23/473 ,  H01L23/00 ,  H01L25/065 ,  H01L23/367 ,  H01L23/373

CPC classification number: H01L23/473 ,  H01L24/08 ,  H01L25/0652 ,  H01L24/16 ,  H01L24/32 ,  H01L24/73 ,  H01L23/3677 ,  H01L23/3675 ,  H01L23/3732 ,  H01L23/3738 ,  H01L2924/3511 ,  H01L2224/08145 ,  H01L2224/08121 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2924/182 ,  H01L2924/186

Abstract: Microelectronic devices, assemblies, and systems include a multichip composite device having one or more chiplets bonded to a base die and an inorganic dielectric material adjacent the chiplets and over the base die. The multichip composite device is coupled to a structural member that is made of or includes a heat conducting material, or has integrated fluidic cooling channels to conduct heat from the chiplets and the base die.

公开(公告)号：US20230282542A1

公开(公告)日：2023-09-07

申请号：US17685060

申请日：2022-03-02

Applicant: Intel Corporation

Inventor： Wenhao Li ,  Feras Eid ,  Yoshihiro Tomita

IPC: H01L23/373

CPC classification number: H01L23/3733 ,  H01L23/3732

Abstract: An integrated circuit assembly may be fabricated to include an integrated circuit device having a backside surface and a metal matrix composite layer on the backside surface, wherein the metal matrix composite layer has a filler material disposed therein to reduce the coefficient of thermal expansion thereof. The filler material may be a plurality of graphitic carbon filler particles, wherein the plurality of graphitic carbon filler particles has an average aspect ratio of greater than about 10, or the filler material may be a plurality of diamond particles, wherein the filler material is clad with a metal material.

公开(公告)号：US20230271445A1

公开(公告)日：2023-08-31

申请号：US17680839

申请日：2022-02-25

Applicant: Intel Corporation

Inventor： Feras Eid ,  Wenhao Li ,  Jiraporn Seangatith ,  Paul Diglio ,  Xavier Brun

IPC: B41N1/24

CPC classification number: B41N1/248

Abstract: Reusable composite stencils for spray processes, particularly for spray processes used in the fabrication of integrated circuit devices, may be fabricated having a permanent core and at least one sacrificial material layer. Thus, in operation, when a predetermined amount of the sacrificial material layer has been ablated away by a material being sprayed in the spray process, the remaining sacrificial material layer may be removed and reapplied to its original thickness. Therefore, the permanent core, which is usually expensive and/or difficult to fabricate, may be repeatedly reused.