公开(公告)号：US20230317660A1

公开(公告)日：2023-10-05

申请号：US17710518

申请日：2022-03-31

申请人： Intel Corporation

发明人： Zhaozhi Li ,  Feras Eid ,  Michael Baker ,  Wenhao Li ,  Pilin Liu ,  Johanna Swan

IPC分类号： H01L23/00

CPC分类号： H01L24/14 ,  H01L24/06 ,  H01L24/81 ,  H01L24/16 ,  H01L2224/1403 ,  H01L2224/10145 ,  H01L2224/0401 ,  H01L2224/81203 ,  H01L2224/16227 ,  H01L2224/14177

摘要： Microelectronic die package structures formed according to some embodiments may include a substrate having one or more solder structures. A first set of solder structures is located in a peripheral region of the substrate and a second set of solder structures is located in a central region of the substrate. A height of individual ones of the second set of solder structures is greater than a height of individual ones of the first set of solder structures. A die having a first side and a second side includes one or more conductive die pads on the first side, where individual ones of the conductive die pads are on individual ones of the first set solder structures and on individual ones of the second set solder structures. A die backside layer is on the second side of the die.

公开(公告)号：US20230317549A1

公开(公告)日：2023-10-05

申请号：US17709064

申请日：2022-03-30

申请人： Intel Corporation

发明人： Feras Eid ,  Wenhao Li ,  Paul Diglio ,  Xavier Brun ,  Johanna Swan

IPC分类号： H01L23/373 ,  H01L21/48

CPC分类号： H01L23/3733 ,  H01L21/4871

摘要： A porous mesh structure for use in the thermal management of integrated circuit devices may be formed as a solid matrix with a plurality of pores dispersed therein, wherein the solid matrix may be a plurality of fused matrix material particles and the plurality of pores may comprise between about 10% and 90% of a volume of the porous mesh structure. The porous mesh structure may be formed on an integrated circuit device and/or on a heat dissipation assembly component, and may be incorporated into an immersion cooling assembly, wherein the porous mesh structure may act as a nucleation site for a working fluid in the immersion cooling assembly.

公开(公告)号：US20240061194A1

公开(公告)日：2024-02-22

申请号：US17821019

申请日：2022-08-19

申请人： Intel Corporation

发明人： Adel A. Elsherbini ,  David Hui ,  Haris Khan Niazi ,  Wenhao Li ,  Bhaskar Jyoti Krishnatreya ,  Henning Braunisch ,  Shawna M. Liff ,  Jiraporn Seangatith ,  Johanna M. Swan ,  Krishna Vasanth Valavala ,  Xavier Francois Brun ,  Feras Eid

IPC分类号： G02B6/42

CPC分类号： G02B6/4274 ,  G02B6/4204

摘要： Microelectronic assemblies, related devices and methods, are disclosed herein. In some embodiments, a microelectronic assembly may include an interconnect die in a first layer surrounded by a dielectric material; a processor integrated circuit (processor IC) and an integrated circuit (IC) in a second layer, the second layer on the first layer, wherein the interconnect die is electrically coupled to the processor IC and the IC by first interconnects having a pitch of less than 10 microns between adjacent first interconnects; a photonic integrated circuit (PIC) and a substrate in a third layer, the third layer on the second layer, wherein the PIC has an active surface, and wherein the active surface of the PIC is coupled to the IC by second interconnects having a pitch of less than 10 microns between adjacent second interconnects; and a fiber connector optically coupled to the active surface of the PIC.

公开(公告)号：US20240063143A1

公开(公告)日：2024-02-22

申请号：US17891690

申请日：2022-08-19

申请人： Intel Corporation

发明人： Adel Elsherbini ,  Lance C. Hibbeler ,  Omkar Karhade ,  Chytra Pawashe ,  Kimin Jun ,  Feras Eid ,  Shawna Liff ,  Mohammad Enamul Kabir ,  Bhaskar Jyoti Krishnatreya ,  Tushar Talukdar ,  Wenhao Li

IPC分类号： H01L23/00 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L23/562 ,  H01L25/0657 ,  H01L24/08 ,  H01L24/80 ,  H01L25/50 ,  H01L2224/08145 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2225/06548 ,  H01L2225/06582 ,  H01L2924/3511

摘要： Techniques and mechanisms to mitigate warping of a composite chiplet. In an embodiment, multiple via structures each extend through an insulator material in one of multiple levels of a composite chiplet. The insulator material extends around an integrated circuit (IC) component in the level. For a given one of the multiple via structures, a respective annular structure extends around the via structure to mitigate a compressive (or tensile) stress due to expansion (or contraction) of the via structure. In another embodiment, the composite chiplet additionally or alternatively comprises a structural support layer on the multiple levels, wherein the structural support layer has formed therein or thereon dummy via structures or a warpage compensation film.

公开(公告)号：US20240063142A1

公开(公告)日：2024-02-22

申请号：US17891666

申请日：2022-08-19

申请人： Intel Corporation

发明人： Adel Elsherbini ,  Wenhao Li ,  Bhaskar Jyoti Krishnatreya ,  Tushar Talukdar ,  Botao Zhang ,  Yi Shi ,  Haris Khan Niazi ,  Feras Eid ,  Nagatoshi Tsunoda ,  Xavier Brun ,  Mohammad Enamul Kabir ,  Omkar Karhade ,  Shawna Liff ,  Jiraporn Seangatith

IPC分类号： H01L23/00 ,  H01L23/367 ,  H01L23/31 ,  H01L23/498 ,  H01L21/48 ,  H01L21/56 ,  H01L25/065 ,  H01L25/00

CPC分类号： H01L23/562 ,  H01L23/367 ,  H01L23/3128 ,  H01L23/49827 ,  H01L23/49838 ,  H01L21/486 ,  H01L21/565 ,  H01L25/0655 ,  H01L25/50

摘要： Multi-die packages including IC die crack mitigation features. Prior to the bonding of IC dies to a host substrate, the IC dies may be shaped, for example with a corner radius or chamfer. After bonding the shaped IC dies, a fill comprising at least one inorganic material may be deposited over the IC dies, for example to backfill a space between adjacent IC dies. With the benefit of a greater IC die sidewall slope and/or smoother surface topology associated with the shaping process, occurrences of stress cracking within the fill and concomitant damage to the IC dies may be reduced. Prior to depositing a fill, a barrier layer may be deposited over the IC die to prevent cracks that might form in the fill material from propagating into the IC die.

公开(公告)号：US20240063089A1

公开(公告)日：2024-02-22

申请号：US17891738

申请日：2022-08-19

申请人： Intel Corporation

发明人： Adel Elsherbini ,  Wenhao Li ,  Bhaskar Jyoti Krishnatreya ,  Debendra Mallik ,  Krishna Vasanth Valavala ,  Lei Jiang ,  Yoshihiro Tomita ,  Omkar Karhade ,  Haris Khan Niazi ,  Tushar Talukdar ,  Mohammad Enamul Kabir ,  Xavier Brun ,  Feras Eid

IPC分类号： H01L23/46

CPC分类号： H01L23/46 ,  G02B6/4268

摘要： Microelectronic devices, assemblies, and systems include a multichip composite device having one or more integrated circuit dies bonded to a base die and an inorganic dielectric material adjacent the integrated circuit dies and over the base die. The multichip composite device includes a dummy die, dummy vias, or integrated fluidic cooling channels laterally adjacent the integrated circuit dies to conduct heat from the base die.

公开(公告)号：US20230317676A1

公开(公告)日：2023-10-05

申请号：US17711926

申请日：2022-04-01

申请人： Intel Corporation

发明人： Michael Baker ,  Feras Eid ,  Wenhao Li ,  Zhaozhi Li ,  Pilin Liu

IPC分类号： H01L23/00 ,  B23K20/02

CPC分类号： H01L24/75 ,  H01L24/81 ,  B23K20/023 ,  H01L2224/05647 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/13082 ,  H01L2224/13111 ,  H01L2224/13139 ,  H01L2224/13147 ,  H01L2224/75983 ,  H01L2224/75984 ,  H01L2224/75985 ,  H01L2224/75312 ,  H01L2224/75252 ,  H01L2224/81192 ,  H01L2224/81203 ,  H01L2224/75253 ,  B23K2101/40

摘要： Microelectronic die package structures formed according to some embodiments may include a thermal compression bonding (TCB) assembly including a bond head with a first thermal zone separated from a second thermal zone by a thermal separator, the thermal separator extending through a thickness of the bond head. A bond head nozzle is coupled to a first side of the bond head, where the bond head nozzle includes one or more nozzle channels extending through a thickness of the bond head nozzle.

公开(公告)号：US20230317675A1

公开(公告)日：2023-10-05

申请号：US17711925

申请日：2022-04-01

申请人： Intel Corporation

发明人： Michael Baker ,  Zhaozhi Li ,  Feras Eid ,  Pilin Liu ,  Wenhao Li

IPC分类号： H01L23/00

CPC分类号： H01L24/75 ,  H01L24/81 ,  H01L2224/81203 ,  H01L2224/75983 ,  H01L2224/75252

摘要： Microelectronic die package structures formed according to some embodiments may include a thermal compression bonding (TCB) tool including a pedestal having a convex surface to receive a package substrate, a bond head to compress a die against the package substrate, and a heat source thermally coupled to at least one of the pedestal or the bond head.

公开(公告)号：US20230317630A1

公开(公告)日：2023-10-05

申请号：US17710502

申请日：2022-03-31

申请人： Intel Corporation

发明人： Wenhao Li ,  Feras Eid ,  Michael Baker ,  Pilin Liu ,  Zhaozhi Li

IPC分类号： H01L23/00

CPC分类号： H01L23/562 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/13147 ,  H01L2224/81203

摘要： Microelectronic die package structures formed according to some embodiments may include a substrate comprising one or more conductive interconnect structures on a surface of the substrate. One or more support features are on one or more peripheral regions of the surface of the substrate. A first side of a die is coupled to the one or more conductive interconnect structures and is over the one or more support features. A die backside layer is on the second side of the die.

公开(公告)号：US20230285999A1

公开(公告)日：2023-09-14

申请号：US17694302

申请日：2022-03-14

申请人： Intel Corporation

发明人： Wenhao Li ,  Feras Eid ,  Paul Diglio ,  Jiraporn Seangatith

IPC分类号： B05B7/14 ,  B05B7/16

CPC分类号： B05B7/1486 ,  B05B7/1626

摘要： Cold-spray nozzles, systems, and techniques are described herein related to manufacturing implementations of efficient film deposition. A deposition system includes multiple feed systems to deliver solid powder materials at controlled feed rates and temperatures, and a nozzle, including convergent and divergent sections and connections to the feed systems, to receive a carrier fluid in the convergent section and to spray the carrier fluid and the solid powder materials out of the divergent section. A nozzle includes multiple ports to receive solid powder materials for admission into a carrier fluid, with one or more ports in the convergent section and one or more ports in the divergent section. A method may include delivering a carrier fluid to a nozzle, heating multiple solid powder materials, delivering these solid powder materials to the nozzle, and spraying the solid powder materials out of a divergent section of the nozzle.