公开(公告)号：US20080274611A1

公开(公告)日：2008-11-06

申请号：US12136885

申请日：2008-06-11

申请人： Cyril Cabral ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

发明人： Cyril Cabral ,  Michael A. Cobb ,  Asa Frye ,  Balasubramanian S. Pranatharthi Haran ,  Randolph F. Knarr ,  Mahadevaiyer Krishnan ,  Christian Lavoie ,  Andrew P. Mansson ,  Renee T. Mo ,  Jay W. Strane ,  Horatio S. Wildman

IPC分类号： H01L21/44

CPC分类号： H01L21/28518 ,  H01L21/28052 ,  H01L29/665

摘要： The present invention provides a method for forming a self-aligned Ni alloy silicide contact. The method of the present invention begins by first depositing a conductive Ni alloy with Pt and optionally at least one of the following metals Pd, Rh, Ti, V, Cr, Zr, Nb, Mo, Hf, Ta, W or Re over an entire semiconductor structure which includes at least one gate stack region. An oxygen diffusion barrier comprising, for example, Ti, TiN or W is deposited over the structure to prevent oxidation of the metals. An annealing step is then employed to cause formation of a NiSi, PtSi contact in regions in which the metals are in contact with silicon. The metal that is in direct contact with insulating material such as SiO2 and Si3N4 is not converted into a metal alloy silicide contact during the annealing step A selective etching step is then performed to remove unreacted metal from the sidewalls of the spacers and trench isolation regions.

摘要翻译： 本发明提供一种形成自对准Ni合金硅化物接触的方法。 本发明的方法首先首先用Pt和任选的以下金属Pd，Rh，Ti，V，Cr，Zr，Nb，Mo，Hf，Ta，W或Re中的至少一种沉积导电Ni合金， 整个半导体结构，其包括至少一个栅极堆叠区域。 包含例如Ti，TiN或W的氧扩散阻挡层沉积在结构上以防止金属的氧化。 然后使用退火步骤在金属与硅接触的区域中形成NiSi，PtSi接触。 与诸如SiO 2和Si 3 N 4 N之类的绝缘材料直接接触的金属在金属合金硅化物接触期间不会转化为金属合金硅化物接触 然后执行退火步骤A选择性蚀刻步骤以从间隔物和沟槽隔离区域的侧壁去除未反应的金属。

公开(公告)号：US07041571B2

公开(公告)日：2006-05-09

申请号：US10708408

申请日：2004-03-01

申请人： Jay W. Strane

发明人： Jay W. Strane

IPC分类号： H01L21/76

CPC分类号： H01L23/5222 ,  H01L21/7682 ,  H01L2924/0002 ,  H01L2924/00

摘要： A dual layer of polymeric material is deposited with a base layer and top layer resist onto an integrated circuit structure with topography. The base layer planarizes the surface and fills in the native topography. The base layer decomposes almost completely when exposed to an oxidizing environment. The top layer contains a high composition of oxidizing elements and is photosensitive. (i.e., the layer can be patterned by exposing normal lithographic techniques.) The patterning allows the creation of escape paths for the decomposition products of the underlying base layer. This structure is decomposed in an oxidizing ambient (or plasma) leaving behind a thin carbon-containing membrane. This membrane layer blocks deposition of future layers, creating air gaps in the structure.

摘要翻译： 聚合物材料的双层沉积有基底层和顶层抗蚀剂到具有形貌的集成电路结构上。 基层平坦化表面并填充原生地形。 当暴露于氧化环境时，基层几乎完全分解。 顶层含有高组分的氧化元素并且是光敏的。 （即，可以通过暴露正常光刻技术来对该层进行图案化）。图案化允许为下层基层的分解产物创建逃生路径。 该结构在氧化环境（或等离子体）中分解，留下薄碳膜。 该膜层阻止未来层的沉积，在结构中产生气隙。

公开(公告)号：US06989317B1

公开(公告)日：2006-01-24

申请号：US10904088

申请日：2004-10-22

申请人： Carl J. Radens ,  Jay W. Strane

发明人： Carl J. Radens ,  Jay W. Strane

IPC分类号： H01L21/76

CPC分类号： H01L21/76802 ,  H01L21/76807 ,  H01L21/76808

摘要： A novel trench etching method for etching trenches of different depths which are self-aligned to one another is presented. The method comprises the steps of (a) creating first and second trenches of a same depth in a dielectric layer, wherein the second trench is wider than the first trench, (b) forming a conformal gapfill layer on top of the dielectric layer such that the conformal gapfill layer is thicker in the first trench than in the second trench, (c) etching back the conformal gapfill layer until a bottom wall of the second trench is exposed to the atmosphere while a bottom wall of the first trench is still covered by the conformal gapfill layer, (d) etching further into the dielectric layer via the second trench. As a result, the second trench is deeper than the first trench.

摘要翻译： 提出了一种用于蚀刻彼此自对准的不同深度的沟槽的新型沟槽蚀刻方法。 该方法包括以下步骤：（a）在电介质层中产生相同深度的第一和第二沟槽，其中第二沟槽比第一沟槽宽，（b）在电介质层的顶部上形成共形间隙填充层，使得 第一沟槽中的保形间隙填充层比第二沟槽厚，（c）蚀刻保形间隙填充层，直到第二沟槽的底壁暴露于大气，同时第一沟槽的底壁仍然被第一沟槽的底壁覆盖 保形间隙填充层，（d）经由第二沟槽进一步蚀刻到介电层中。 结果，第二沟槽比第一沟槽更深。