Recycling Partially-Stale Flash Blocks Using a Sliding Window for Multi-Level-Cell (MLC) Flash Memory
    21.
    发明申请
    Recycling Partially-Stale Flash Blocks Using a Sliding Window for Multi-Level-Cell (MLC) Flash Memory 失效
    使用滑动窗口回收部分陈旧的闪存块用于多级单元(MLC)闪存

    公开(公告)号:US20070268754A1

    公开(公告)日:2007-11-22

    申请号:US11674645

    申请日:2007-02-13

    IPC分类号: G11C16/04 G06F12/00

    摘要: A sliding window of flash blocks is used to reduce wasted space occupied by stale data in a flash memory. The sliding window slides downward over a few flash blocks. The oldest block is examined for valid pages of data, and the valid pages are copied to the end of the sliding window so that the first block has only stale pages. The first block can then be erased and eventually re-used. A RAM usage table contains valid bits for pages in each block in the sliding window. A page's valid bit is changed from an erased, unwritten state to a valid state when data is written to the page. Later, when new host data replaces that data, the old page's valid bit is set to the stale state. A RAM stale-flags table keeps track of pages that are full of stale pages.

    摘要翻译: 闪存块的滑动窗口用于减少闪存中过时数据占用的浪费空间。 滑动窗口向下滑过几个闪光块。 检查最旧的块是否有效的数据页面,有效的页面被复制到滑动窗口的末尾,以便第一个块只有过时的页面。 然后可以擦除第一个块并最终重新使用。 RAM使用表包含滑动窗口中每个块中页面的有效位。 当数据写入页面时,页面的有效位从擦除的未写入状态更改为有效状态。 之后,当新的主机数据替换该数据时,旧页面的有效位被设置为陈旧状态。 RAM陈旧标记表可以跟踪页面中已经有过时的页面。

    Cell-Downgrading and Reference-Voltage Adjustment for a Multi-Bit-Cell Flash Memory
    22.
    发明申请
    Cell-Downgrading and Reference-Voltage Adjustment for a Multi-Bit-Cell Flash Memory 失效
    用于多位单元闪存的单元降级和参考电压调整

    公开(公告)号:US20070201274A1

    公开(公告)日:2007-08-30

    申请号:US11737336

    申请日:2007-04-19

    IPC分类号: G11C11/34

    摘要: A flash memory has multi-level cells (MLC) that can each store multiple bits per cell. Blocks of cells can be downgraded to fewer bits/cell when errors occur, or for storing critical data such as boot code. The bits from a single MLC are partitioned among multiple pages to improve error correctability using Error Correction Code (ECC). An upper reference voltage is generated by a voltage reference generator in response to calibration registers that can be programmed to alter the upper reference voltage. A series of decreasing references are generated from the upper reference voltage and are compared to a bit-line voltage. Compare results are translated by translation logic that generates read data and over- and under-programming signals. Downgraded cells use the same truth table but generate fewer read data bits. Noise margins are asymmetrically improved by using the same sub-states for reading downgraded and full-density MLC cells.

    摘要翻译: 闪存具有多级单元(MLC),每个单元可以存储多个位。 当发生错误时,单元块可以降级到较少的位/单元,或用于存储关键数据(如引导代码)。 来自单个MLC的位在多个页面之间进行分区,以使用错误校正码(ECC)来提高错误的可校正性。 响应于校准寄存器,由参考电压发生器产生较高的参考电压,校准寄存器可编程为改变上参考电压。 从较高参考电压产生一系列减小的参考值,并将其与位线电压进行比较。 比较结果由翻译逻辑翻译,生成读取数据和编程过程中和编程不足的信号。 降级的单元格使用相同的真值表,但生成较少的读取数据位。 通过使用相同的子状态来读取降级和全密度MLC单元,噪声余量被不对称地改善。

    Flash micro-controller with shadow boot-loader SRAM for dual-device booting of micro-controller and host
    23.
    发明申请
    Flash micro-controller with shadow boot-loader SRAM for dual-device booting of micro-controller and host 失效
    闪存微控制器带有引导加载器的SRAM,用于微控制器和主机的双设备启动

    公开(公告)号:US20080040598A1

    公开(公告)日:2008-02-14

    申请号:US11875648

    申请日:2007-10-19

    IPC分类号: G06F15/177

    CPC分类号: G06F9/441

    摘要: A flash microcontroller has a Static Random-Access-Memory (SRAM) buffer that stores several blocks of boot code read from a flash memory. The boot code includes an initial boot loader, boot code and a control program that are executed by the flash microcontroller, and an operating system OS image and an external-host control program that are executed by an external host. Both the external host and the microcontroller are booted from boot code buffered in the SRAM buffer. A first-reset-read address from the external host is captured by the microcontroller during its boot sequence and stored in a mapping table along with a physical address of the block in the SRAM buffer with the operating system OS image and the external-host control program. A boot-loader state machine reads the flash ID and programs flash parameter registers with timing parameters for the flash memory.

    摘要翻译: 闪存微控制器具有静态随机存取存储器(SRAM)缓冲器,其存储从闪存读取的几个引导代码块。 引导代码包括由闪存微控制器执行的初始引导加载程序,引导代码和控制程序,以及由外部主机执行的操作系统OS映像和外部主机控制程序。 外部主机和微控制器均由缓冲在SRAM缓冲区中的引导代码引导。 微控制器在其引导序列期间捕获来自外部主机的第一复位读取地址,并将其与SRAM缓冲器中具有操作系统OS映像和外部主机控制的块的物理地址一起存储在映射表中 程序。 引导加载器状态机读取闪存ID,并使用Flash存储器的时序参数对闪存参数寄存器进行编程。

    Electronic Data Flash Card with Reed Solomon Error Detection and Correction Capability
    24.
    发明申请
    Electronic Data Flash Card with Reed Solomon Error Detection and Correction Capability 失效
    具有Reed Solomon错误检测和校正能力的电子数据闪存卡

    公开(公告)号:US20070204206A1

    公开(公告)日:2007-08-30

    申请号:US11739613

    申请日:2007-04-24

    IPC分类号: H03M13/05

    摘要: One embodiment of the present includes a electronic data storage card having a Reed Solomon (RS) decoder having a syndrome calculator block responsive to a page of information, the page being organized into a plurality of data sections and the overhead being organized into a plurality of overhead sections. The syndrome calculator generates a syndrome for each of the data sections. The decoder further includes a root finder block responsive to the calculated syndrome and for generating at least two roots, a polynomial calculator block responsive to the at least two roots and operative to generate at least one error address, identifying a location in the data wherein the error lies, and an error symbol values calculator block coupled to the root finder and the polynomial calculator block and for generating a second error address, identifying a second location in the data wherein the error(s) lie.

    摘要翻译: 本发明的一个实施例包括具有Reed Solomon(RS)解码器的电子数据存储卡,该解码器具有响应于信息页的校正子计算器块,该页被组织成多个数据段,并且开销被组织成多个 架空部分。 综合征计算器为每个数据部分产生综合征。 解码器还包括响应于所计算的校正子并用于生成至少两个根的根取景器块,响应于至少两个根并且可操作地生成至少一个错误地址的多项式计算器块,识别数据中的位置,其中, 并且错误符号值计算器块耦合到根查找器和多项式计算器块,并用于产生第二错误地址,识别错误所在的数据中的第二位置。

    Content Protection Using Encryption Key Embedded with Content File
    25.
    发明申请
    Content Protection Using Encryption Key Embedded with Content File 审中-公开
    使用嵌入内容文件的加密密钥进行内容保护

    公开(公告)号:US20070156587A1

    公开(公告)日:2007-07-05

    申请号:US11677658

    申请日:2007-02-22

    IPC分类号: G06Q99/00

    CPC分类号: G06F21/10

    摘要: Content on a storage medium is protected from unauthorized use, such as excessive copying or expired playback. A storage medium contains encrypted content and an encrypted content key with rules such as usage and copy rules. An interface between a record/playback device and the storage medium has enhanced security by not passing unprotected encryption keys that might be intercepted by external hackers. A content key is combined with usage and copy rules and then encrypted with a unique key, and may be doubly-encrypted with a control key before transmission over the interface. The unique key is generated from a key matrix on the record/playback device using row and columns received from the storage medium. The storage medium stores a pre-loaded copy of the unique key. The control key is generated from a random number on the record/playback device and storage medium avoiding transmission over the interface.

    摘要翻译: 保护存储介质上的内容免受未经授权的使用,例如过度复制或过期播放。 存储介质包含加密内容和具有诸如使用和复制规则等规则的加密内容密钥。 记录/回放设备和存储介质之间的接口通过不传递可能被外部黑客拦截的未受保护的加密密钥而增强了安全性。 内容密钥与使用和复制规则组合,然后用唯一密钥加密,并且可以在通过接口传输之前用控制密钥进行双重加密。 使用从存储介质接收的行和列从记录/回放设备上的按键矩阵生成唯一密钥。 存储介质存储唯一密钥的预加载副本。 该控制键是从记录/重放设备和存储介质上的随机数生成的,避免了通过接口的传输。

    MP3 Player with Digital Rights Management
    26.
    发明申请
    MP3 Player with Digital Rights Management 失效
    具有数字版权管理的MP3播放器

    公开(公告)号:US20070150963A1

    公开(公告)日:2007-06-28

    申请号:US11668316

    申请日:2007-01-29

    IPC分类号: H04L9/32

    摘要: A portable media player receives encrypted audio files and an encrypted content key from a central license server on the Internet. The media player supports digital rights management (DRM) by storing the encrypted audio file in its flash memory and disabling copying or playing of the audio file after a copy limit has been reached. The copy limit is a rule that is combined with the content key in a transfer key that can be encrypted together by the license server. The license server can detect cloning of the media player by reading a unique player ID from the player and detecting when too many accounts use the same unique player ID. The content key can be generated from polar coordinates of the unique player ID, player manufacturer, and song genre. A fingerprint sensor on the player can scan and compare the user's fingerprints to further detect cloning.

    摘要翻译: 便携式媒体播放器从互联网上的中央许可证服务器接收加密的音频文件和加密的内容密钥。 媒体播放器通过将加密的音频文件存储在其闪存中来支持数字权限管理(DRM),并且在达到复制限制之后禁用复制或播放音频文件。 复制限制是与许可证服务器可一起加密的传输密钥中的内容密钥相结合的规则。 许可证服务器可以通过从播放器中读取唯一的播放器ID来检测媒体播放器的克隆,并检测何时太多的帐户使用相同的唯一播放器ID。 内容密钥可以由唯一播放器ID,播放器制造商和歌曲类型的极坐标生成。 播放器上的指纹传感器可以扫描并比较用户的指纹,以进一步检测克隆。

    System and method for producing high volume flash memory cards
    27.
    发明申请
    System and method for producing high volume flash memory cards 审中-公开
    用于生产大容量闪存卡的系统和方法

    公开(公告)号:US20080065788A1

    公开(公告)日:2008-03-13

    申请号:US11979102

    申请日:2007-10-31

    IPC分类号: G06F13/10

    摘要: A system for producing high volume flash memory cards includes a processing unit, a PC interface for connecting to an external PC, a PC drive circuit connected to the PC interface and the processing unit, a card interface for connecting to an external flash memory card, and a card drive circuit connected to the card interface and the processing unit. The PC drive circuit realizes communication between the PC and the processing unit. The card drive circuit realizes communication between the flash memory card and the processing unit. The processing unit receives command or data from the PC interface, and sends card re-initialization command or data to the flash memory card via the card interface.

    摘要翻译: 一种用于生产大容量闪存卡的系统包括处理单元,用于连接到外部PC的PC接口,连接到PC接口的PC驱动电路和处理单元,用于连接到外部闪存卡的卡接口, 以及连接到卡接口和处理单元的卡驱动电路。 PC驱动电路实现PC与处理单元之间的通信。 卡驱动电路实现闪存卡和处理单元之间的通信。 处理单元从PC接口接收命令或数据,并通过卡接口将卡重新初始化命令或数据发送到闪存卡。

    Multi-level cell (MLC) dual personality extended fiber optic flash memory device
    28.
    发明授权
    Multi-level cell (MLC) dual personality extended fiber optic flash memory device 失效
    多级单元(MLC)双重人格扩展光纤闪存设备

    公开(公告)号:US08061905B2

    公开(公告)日:2011-11-22

    申请号:US12111872

    申请日:2008-04-29

    IPC分类号: G02B6/38

    CPC分类号: G06K19/07732

    摘要: A multi-level cell (MLC) dual-personality extended fiber optic flash drive includes a MLC dual-personality extended fiber optic Universal Serial Bus (USB) plug connector connected to a dual-personality extended fiber optic flash drive and being removably connectable to a host. The connector is adaptable to receive electrical data and optical data. A transceiver, located on the flash drive, is operative to convert received electrical data to optical data or to convert received optical data to electrical data.

    摘要翻译: 多级单元(MLC)双人格扩展光纤闪存驱动器包括连接到双人格扩展光纤闪存驱动器的MLC双人格扩展光纤通用串行总线(USB)插头连接器,并且可移除地连接到 主办。 该连接器适用于接收电气数据和光学数据。 位于闪存驱动器上的收发器用于将接收的电数据转换为光学数据或将接收到的光学数据转换为电气数据。