公开(公告)号：US20210273055A1

公开(公告)日：2021-09-02

申请号：US17019683

申请日：2020-09-14

Applicant: Kioxia Corporation

Inventor： Naomi YANAI ,  Yasuhito YOSHIMIZU ,  Takashi ISHIDA

IPC: H01L29/10 ,  H01L27/11524 ,  H01L27/11556 ,  H01L27/1157 ,  H01L27/11582 ,  H01L29/423 ,  H01L29/66 ,  H01L29/792 ,  H01L29/788

Abstract: A semiconductor storage device according to the present embodiment includes a first semiconductor layer containing impurities. A stacked body is provided above the first semiconductor layer and includes insulating layers and conductive layers that are alternately stacked. A semiconductor body penetrates through the stacked body in a stacking direction to reach the first semiconductor layer and includes a lower region on a side of the first semiconductor layer and an upper region positioned above the lower region. A charge accumulation part is provided between the semiconductor bodies and the conductive layers. An impurity concentration of the lower region of the semiconductor body is higher than that of the first semiconductor layer.

公开(公告)号：US20210149568A1

公开(公告)日：2021-05-20

申请号：US17121024

申请日：2020-12-14

Applicant: Kioxia Corporation

Inventor： Yasuhito YOSHIMIZU ,  Takashi FUKUSHIMA ,  Tatsuro HITOMI ,  Arata INOUE ,  Masayuki MIURA ,  Shinichi KANNO ,  Toshio FUJISAWA ,  Keisuke NAKATSUKA ,  Tomoya SANUKI

IPC: G06F3/06 ,  G06F12/1009 ,  G06F12/02

Abstract: According to one embodiment, a storage device includes a stage on which a semiconductor wafer can be mounted, wherein data is capable of being read from the semiconductor wafer or data is capable of being written to the semiconductor wafer. The storage device further includes a plurality of probe pins for reading or writing data, and a controller connected the probe pins. The semiconductor wafer includes electrodes connectable to the probe pins, a first memory area that can store user data, and a second memory area that can store identification information for identification of the semiconductor wafer and a check code for checking integrity of the identification information. The controller is capable of reading the identification information and the check code from the second memory area.

公开(公告)号：US20220130754A1

公开(公告)日：2022-04-28

申请号：US17438728

申请日：2019-03-19

Applicant: Kioxia Corporation

Inventor： Keisuke NAKATSUKA ,  Yasuhito YOSHIMIZU ,  Tomoya SANUKI ,  Fumitaka ARAI

IPC: H01L23/522 ,  H01L23/535 ,  H01L27/11556 ,  H01L27/11582

Abstract: A semiconductor memory device including: plural first conductive layers stacked on a substrate; plural second conductive layers each stacked between the first conductive layers; a pillar that extends in a stacking direction of the first and second conductive layers and forms plural memory cells at intersections of the first and second conductive layers in a region where first and second conductive layers are arranged; a first contact plug that extends in the stacking direction of the first and second conductive layers and is connected to the first conductive layers in the region where the first and second conductive layers are arranged; and a second contact plug that extends in the stacking direction of the first and second conductive layers and is connected to the second conductive layers in the region where the first conductive layers and second conductive layers are arranged.

公开(公告)号：US20220085036A1

公开(公告)日：2022-03-17

申请号：US17190348

申请日：2021-03-02

Applicant: KIOXIA CORPORATION

Inventor： Yasuhito YOSHIMIZU ,  Hiroshi NAKAKI ,  Kazuaki NAKAJIMA

IPC: H01L27/1157 ,  H01L23/00 ,  H01L27/11519 ,  H01L27/11524 ,  H01L27/11551 ,  H01L27/11565 ,  H01L27/11578

Abstract: A semiconductor storage device includes first wiring layers stacked along a first direction, a first pillar including a first semiconductor layer and extending along the first direction through the first wiring layers, a second wiring layer disposed above the first pillar in the first direction and extending along a second direction perpendicular to the first direction, a semiconductor-containing layer including a first portion disposed on an upper end of the first pillar in the first direction, a second portion contacting the first portion and formed along the second wiring layer, and a third portion contacting an upper end of the second portion and extending along a third direction perpendicular to the first direction and crossing the second direction, and a first insulating layer between each of the first and second portions of the semiconductor-containing layer and the second wiring layer. An upper surface of the third portion contains a metal.

公开(公告)号：US20220068961A1

公开(公告)日：2022-03-03

申请号：US17188575

申请日：2021-03-01

Applicant: KIOXIA CORPORATION

Inventor： Yasuhito YOSHIMIZU ,  Hiroshi NAKAKI

IPC: H01L27/11582 ,  H01L23/522 ,  H01L23/00 ,  H01L25/18 ,  H01L25/065 ,  H01L27/11556

Abstract: A semiconductor storage device includes first and second stacks, and first to fourth semiconductor layers. The first stack includes first conductive layers and first insulating layers alternately stacked in a first direction. The first semiconductor layer extends through the first stack. The second semiconductor layer extends in a second direction above the first stack and connected to the first semiconductor layer. The second stack includes second conductive layers and second insulating layers alternately stacked in the first direction. The first and second stacks are arranged in a third direction. The third semiconductor layer extends through the second stack. The fourth semiconductor layer extends in the second direction above the second stack and connected to the third semiconductor layer. A third conductive layer is in contact with upper surfaces of the second and fourth semiconductor layers. The second and fourth semiconductor layers are separated from each other in the third direction.

公开(公告)号：US20210296239A1

公开(公告)日：2021-09-23

申请号：US17172470

申请日：2021-02-10

Applicant: KIOXIA CORPORATION

Inventor： Yasuhito YOSHIMIZU

IPC: H01L23/535 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L23/522 ,  H01L27/11582 ,  H01L21/768

Abstract: A semiconductor storage device includes a semiconductor substrate and a conductive layer separated from the semiconductor substrate in a first direction. The conductive layer extends in a second direction parallel to the semiconductor substrate. A semiconductor layer extends in the first direction through the conductive layer. A first contact extends in the first direction and is connected to a surface of the conductive layer facing away from the semiconductor substrate. A first insulating layer extends in the first direction, and a second insulating layer extends along the first insulating layer in the first direction. Each of the first and second insulating layers entirely overlaps with the first contact when viewed in the first direction.

公开(公告)号：US20210265386A1

公开(公告)日：2021-08-26

申请号：US17006656

申请日：2020-08-28

Applicant: KIOXIA CORPORATION

Inventor： Yasuhito YOSHIMIZU

IPC: H01L27/11582 ,  H01L27/1157 ,  H01L23/48

Abstract: A semiconductor storage device includes a stacked body, a first columnar portion, a second columnar portion, and second insulating layers. The stacked body includes a plurality of conductive layers and a plurality of first insulating layers alternately stacked in a first direction. The first columnar portion being in a first region, and the second columnar portion being in a second region. The first columnar penetrates the stacked body in the first direction and includes a semiconductor layer. The second columnar portion penetrates the stacked body in the first direction and includes an insulating layer thereon. The second insulating layers are between the second columnar portion and either the conductive layers or the first insulating layers. The insulating layer on the second columnar portion. The second insulating layers are between the insulating layer on the second columnar portion and one of the conductive layers or the first insulating layers.

公开(公告)号：US20210074638A1

公开(公告)日：2021-03-11

申请号：US17015868

申请日：2020-09-09

Applicant: Kioxia Corporation

Inventor： Tomoya SANUKI ,  Keisuke NAKATSUKA ,  Yasuhito YOSHIMIZU

IPC: H01L23/535 ,  H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L21/768 ,  H01L25/00

Abstract: In one embodiment, a semiconductor device includes a substrate including two element regions that extend in a first direction parallel to a surface of the substrate and are adjacent to each other in a second direction crossing the first direction. The device further includes an interconnection layer provided above the substrate. The device further includes an insulator provided between the substrate and the interconnection layer. The device further includes a plug extending in the second direction and in a third direction crossing the first and second directions in the insulator, provided on each of the element regions, and electrically connected to the element regions and the interconnection layer.

公开(公告)号：US20210043640A1

公开(公告)日：2021-02-11

申请号：US16986853

申请日：2020-08-06

Applicant: Kioxia Corporation

Inventor： Genki KAWAGUCHI ,  Yasuhito YOSHIMIZU ,  Yusuke SHIMA

IPC: H01L27/11556 ,  H01L27/11582 ,  G11C5/06 ,  G11C5/02 ,  G11C16/04

Abstract: According to one embodiment, a semiconductor memory device includes: a plurality of first insulating layers; a plurality of first interconnect layers stacked alternately with the first insulating layers; a plurality of second interconnect layers arranged adjacently to the first interconnect layers; and a separation region including a plurality of first portions provided between the first interconnect layers and the second interconnect layers, and a plurality of second portions protruding from an outer periphery of each of the first portions. The second portions are linked to each other. The first interconnect layers and the second interconnect layers are separated from each other by the first portions and the linked second portions.