LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices
    23.
    发明授权
    LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices 失效
    具有用CSI(循环移位身份)和空子矩阵选择性构造的相应奇偶校验矩阵的LDPC(低密度奇偶校验)码

    公开(公告)号:US07900127B2

    公开(公告)日:2011-03-01

    申请号:US12533306

    申请日:2009-07-31

    IPC分类号: G06F11/00

    摘要: LDPC (Low Density Parity Check) codes with corresponding parity check matrices selectively constructed with CSI (Cyclic Shifted Identity) and null sub-matrices. An LDPC matrix corresponding to an LDPC code is employed within a communication device to encode and/or decode coded signals for use in any of a number of communication systems. The LDPC matrix is composed of a number of sub-matrices and may be partitioned into a left hand side matrix and a right hand side matrix. The right hand side matrix may include two sub-matrix diagonals therein that are composed entirely of CSI (Cyclic Shifted Identity) sub-matrices; one of these two sub-matrix diagonals is located on the center sub-matrix diagonal and the other is located just to the left thereof. All other sub-matrices of the right hand side matrix may be null sub-matrices (i.e., all elements therein are values of zero “0”).

    摘要翻译: 具有用CSI(循环移位身份)和空子矩阵选择性构造的相应奇偶校验矩阵的LDPC(低密度奇偶校验)码。 在通信设备内采用对应于LDPC码的LDPC矩阵来编码和/或解码用于多个通信系统中的任何一个的编码信号。 LDPC矩阵由多个子矩阵组成,并且可以被划分为左手侧矩阵和右手侧矩阵。 右手侧矩阵可以包括其中完全由CSI(循环移位身份)子矩阵组成的两个子矩阵对角线; 这两个子矩阵对角线之一位于中心子矩阵对角线上,另一个位于其左侧。 右侧方矩阵的所有其他子矩阵可以是空子矩阵(即,其中的所有元素为零“0”)。

    Short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications
    25.
    发明授权
    Short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications 失效
    适用于高速以太网应用的短长度LDPC(低密度奇偶校验)码和调制

    公开(公告)号:US07559010B2

    公开(公告)日:2009-07-07

    申请号:US11190657

    申请日:2005-07-27

    IPC分类号: H03M13/00

    摘要: A short length LDPC (Low Density Parity Check) code and modulation adapted for high speed Ethernet applications. In some instances, the short length LDPC code and modulation may be employed within the recommended practices currently being developed by the IEEE 802.3an (10GBASE-T) Task Force. The IEEE 802.3an (10GBASE-T) Task Force has been commissioned to develop and standardize communications protocol adapted particularly for Ethernet operation over 4 wire twisted pair cables. A new LDPC code, some possible embodiments of constellations and the corresponding mappings, as well as possible embodiments of various parity check matrices, H, of the LDPC code are presented herein to provide for better overall performance than other proposed LDPC codes existent in the art of high speed Ethernet applications. Moreover, this proposed LDPC code may be decoded using a communication device having much less complexity than required to decode other proposed LDPC codes existent in this technology space.

    摘要翻译: 适用于高速以太网应用的短长度LDPC(低密度奇偶校验)码和调制。 在一些情况下,可以在IEEE 802.3an(10GBASE-T)任务组正在开发的推荐实践中采用短长度LDPC码和调制。 IEEE 802.3an(10GBASE-T)工作组已委托开发和标准化通信协议,特别适用于通过4线双绞线电缆进行以太网操作。 本文中呈现了新的LDPC码,星座的一些可能的实施例和对应的映射以及LDPC码的各种奇偶校验矩阵H的可能实施例,以提供比本领域中存在的其它提出的LDPC码更好的总体性能 的高速以太网应用。 此外,该提出的LDPC码可以使用比在该技术空间中存在的其它提出的LDPC码要求更低的复杂度的通信设备进行解码。

    Construction of irregular LDPC (low density parity check) codes using RS (Reed-Solomon) codes or GRS (generalized Reed-Solomon) code
    26.
    发明授权
    Construction of irregular LDPC (low density parity check) codes using RS (Reed-Solomon) codes or GRS (generalized Reed-Solomon) code 有权
    使用RS(里德 - 所罗门)码或GRS(广义里德 - 所罗门)码构造不规则LDPC(低密度奇偶校验)码

    公开(公告)号:US07549105B2

    公开(公告)日:2009-06-16

    申请号:US11264997

    申请日:2005-11-02

    IPC分类号: H03M13/00

    摘要: Construction of Irregular LDPC (Low Density Parity Check) codes using RS (Reed-Solomon) codes or GRS (Generalized Reed-Solomon) codes. As described herein, a wide variety of irregular LDPC codes may be generated using GRS or RS codes. The corresponding LDPC matrix of such an irregular LDPC code may be constructed by performing partial-matrix processing (including decomposition and partial-matrix replacement thereof) of a parity check matrix that corresponds to a GRS-based regular LDPC code. Such an irregular LDPC code may be appropriately designed using these principles thereby generating a code that is suitable for use in wireless communication systems including those that comply with the recommendation practices and standards being developed by the IEEE (Institute of Electrical & Electronics Engineers) 802.11n Task Group (i.e., the Task Group that is working to develop a standard for 802.11 TGn (High Throughput)).

    摘要翻译: 使用RS(里德 - 所罗门)代码或GRS(广义里德 - 所罗门)代码构建不规则LDPC(低密度奇偶校验)码。 如本文所述,可以使用GRS或RS代码来生成各种不规则的LDPC码。 可以通过对与基于GRS的常规LDPC码相对应的奇偶校验矩阵进行部分矩阵处理(包括其分解和部分矩阵替换)来构造这种不规则LDPC码的对应LDPC矩阵。 可以使用这些原理来适当地设计这样的不规则LDPC码,从而生成适合于无线通信系统中使用的代码,包括符合IEEE(Institute of Electrical&Electronics Engineers)802.11n的建议实践和标准的代码 任务组(即正在努力制定802.11 TGn(高吞吐量)标准的任务组)。

    LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and associated labeling
    27.
    发明授权
    LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and associated labeling 失效
    LDPC(低密度奇偶校验)编码128 DSQ(双方QAM)星座调制和相关标签

    公开(公告)号:US07515642B2

    公开(公告)日:2009-04-07

    申请号:US11211210

    申请日:2005-08-25

    IPC分类号: H04L5/12

    摘要: LDPC (Low Density Parity Check) coded 128 DSQ (Double Square QAM) constellation modulation and its associated labeling. A novel means is introduced by which a constellation may be arranged and mapping in its symbols may be determined to provide for improved performance. One application area in which this may be employed is transmission over twisted pair (typically copper) cabling existent within data centers of various networks. The operation of the IEEE 802.3 Ethernet local area networks currently being used (as well as those currently under development) would benefit greatly by employing the various principles presented herein. When this novel approach of an LDPC coded 128 DSQ constellation modulation combined with TH (Tomlinson-Harashima) preceding is employed within a communication device at a transmitter end of a communication channel (i.e., in a transmitter and/or a transceiver), the overall operation of a communication system may improve significantly when compared to prior techniques.

    摘要翻译: LDPC(低密度奇偶校验)编码128 DSQ(双方QAM)星座调制及其相关标签。 引入了一种新颖的装置,通过该装置可以布置星座,并且可以确定其符号中的映射以提供改进的性能。 可以采用这种方式的一个应用领域是在各种网络的数据中心内存在的双绞线(通常为铜缆)布线。 目前正在使用的IEEE 802.3以太网局域网(以及目前正在开发中的那些)的运行将通过采用本文呈现的各种原理而受益匪浅。 当在通信信道(即,在发射机和/或收发机)的发射机端的通信设备内采用与TH(Tomlinson-Harashima)组合的LDPC编码的128个DSQ星座调制的新颖方法时, 与现有技术相比,通信系统的操作可以显着改善。

    Decoder design adaptable to decode coded signals using min* or max* processing
    28.
    发明授权
    Decoder design adaptable to decode coded signals using min* or max* processing 有权
    解码器设计适用于使用最小*或最大*处理解码编码信号

    公开(公告)号:US07415079B2

    公开(公告)日:2008-08-19

    申请号:US10865456

    申请日:2004-06-10

    IPC分类号: H03D1/00 H03M13/03

    摘要: Decoder design adaptable to decode coded signals using min* or max* processing. A very efficient means of min* processing or max* processing may be performed within a communication device to assist in the very complex and cumbersome calculations that are employed when decoding coded signals. The types of coded signals that may be decoded using min* processing or max* processing are varied, and they include LDPC (Low Density Parity Check) coded signals, turbo coded signals, and TTCM (Turbo Trellis Coded Modulation) coded signals, among other coded signal types. Many of the calculations and/or determinations performed within min* processing or max* processing are performed simultaneously and in parallel of one another thereby ensuring very fast operation. In a finite precision digital implementation, when certain calculated bits of min* or max* processing are available, they govern selection of resultants from among multiple calculations and determinations made simultaneously and in parallel.

    摘要翻译: 解码器设计适用于使用最小*或最大*处理解码编码信号。 可以在通信设备内执行min *处理或max *处理的非常有效的方法,以帮助解码编码信号时所采用的非常复杂且繁琐的计算。 可以使用min *处理或max *处理来解码的编码信号的类型是不同的,并且它们包括LDPC(低密度奇偶校验)编码信号,turbo编码信号和TTCM(Turbo网格编码调制)编码信号,以及其他 编码信号类型。 在min *处理或max *处理之内执行的许多计算和/或确定在彼此并行并行地执行,从而确保非常快速的操作。 在有限精度数字实现中,当某些计算的min *或max *处理的位可用时,它们可以对多个计算中的结果进行选择,同时并行地进行确定。

    Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder
    29.
    发明授权
    Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder 有权
    支持LDPC(低密度奇偶校验)解码器中的位节点和校验节点处理的公共电路

    公开(公告)号:US07395487B2

    公开(公告)日:2008-07-01

    申请号:US11171568

    申请日:2005-06-30

    摘要: Common circuitry supporting both bit node and check node processing in LDPC (Low Density Parity Check) decoder. A novel approach is presented by which a decoder may use the same circuitry to perform updating of edge messages with respect to bit nodes as well as updating of edge messages with respect to check nodes in the context of decoding LDPC coded signals. In addition, several very efficient architectures are presented to performing check node processing that involves the updating of edge messages with respect to check nodes. One embodiment performs check node processing using min** (min-double-star) processing in conjunction with min**− (min-double-star-minus) processing. Another embodiment performs check node processing using min†† (min-double-dagger) processing in conjunction with min†− (min-dagger-minus) processing. In addition, a single FIFO may be implemented to service a number of macro blocks in a parallel decoding implementation.

    摘要翻译: 支持LDPC(低密度奇偶校验)解码器中的位节点和校验节点处理的公共电路。 提出了一种新颖的方法,其中解码器可以使用相同的电路来执行相对于位节点的边缘消息的更新,以及在解码LDPC编码信号的上下文中关于校验节点的边缘消息的更新。 此外,提出了几个非常有效的架构来执行涉及到关于校验节点的边缘消息的更新的校验节点处理。 一个实施例使用min **(min-double-star)处理结合min ** - (min-double-star-minus)处理来执行校验节点处理。 另一个实施例使用min††(最小双匕首)处理结合最小† - (最小匕首 - 减号)处理来执行校验节点处理。 此外,可以实现单个FIFO以在并行解码实现中服务多个宏块。

    LDPC (Low Density Parity Check) coded modulation hybrid decoding using non-Gray code maps for improved performance
    30.
    发明授权
    LDPC (Low Density Parity Check) coded modulation hybrid decoding using non-Gray code maps for improved performance 有权
    使用非格雷码的LDPC(低密度奇偶校验)编码调制混合解码,以提高性能

    公开(公告)号:US07383493B2

    公开(公告)日:2008-06-03

    申请号:US10802011

    申请日:2004-03-16

    IPC分类号: G06F11/00 H03M13/00

    摘要: LDPC (Low Density Parity Check) coded modulation hybrid decoding using non-Gray code maps for improved performance. Check node updating and symbol node updating are successively and alternatively performed on bit edge messages for a predetermined number of decoding iterations or until sufficient degree of precision is achieved. The symbol node updating of the bit edge messages uses symbol metrics corresponding to the symbol being decoded and the bit edge messages most recently updated by check node updating. The check node updating of the bit edge messages uses the bit edge messages most recently updated by symbol node updating. The symbol node updating computes possible soft symbol estimates. LDPC coded modulation hybrid decoding can decode an LDPC-BICM (Low Density Parity Check-Bit Interleaved Coded Modulation) signal having a symbol mapped using non-Gray code mapping. By using the non-Gray code mapping, a performance improvement is achieved over an only Gray code mapping system.

    摘要翻译: 使用非格雷码的LDPC(低密度奇偶校验)编码调制混合解码,以提高性能。 对于预定数量的解码迭代,或者直到达到足够的精度,连续替代地对位边消息执行检查节点更新和符号节点更新。 比特边消息的符号节点更新使用与正被解码的符号相对应的符号度量和最近由校验节点更新更新的位边消息。 位边消息的校验节点更新使用最近由符号节点更新更新的位边消息。 符号节点更新计算可能的软符号估计。 LDPC编码调制混合解码可以解码具有使用非格雷码映射的符号映射的LDPC-BICM(低密度奇偶校验位交错编码调制)信号。 通过使用非格雷码映射,仅通过格雷码映射系统实现性能提升。