公开(公告)号：US08773789B1

公开(公告)日：2014-07-08

申请号：US13767317

申请日：2013-02-14

Applicant: LSI Corporation

Inventor： Wu Chang ,  Parviz Rahgozar ,  Ming Jin ,  Haitao Xia

IPC: G11B27/36 ,  G11B20/10

CPC classification number: G11B20/10481

Abstract: In one embodiment, a read/write chip for a hard disc drive has at least one on-chip, in-channel, hardware-based optimization processor that is part of one or more channels (e.g., read, write, and/or servo) of the read/write chip. The optimization processor can iteratively evaluate the performance of a channel for different values of one or more different parameters that control channel processing by generating an appropriate metric value for each different parameter value. The optimization processor can then select an optimal parameter value for subsequent channel processing.

Abstract translation: 在一个实施例中，用于硬盘驱动器的读/写芯片具有至少一个片上，基于信道内的基于硬件的优化处理器，其是一个或多个通道（例如，读，写和/或伺服）的一部分 ）的读/写芯片。 优化处理器可以通过针对每个不同的参数值生成适当的度量值来迭代地评估一个或多个不同参数的不同值的信道的性能，所述不同参数控制信道处理。 然后，优化处理器可以为随后的信道处理选择最佳参数值。

公开(公告)号：US08760783B2

公开(公告)日：2014-06-24

申请号：US13624234

申请日：2012-09-21

Applicant: LSI Corporation

Inventor： Ming Jin ,  Jun Xiao ,  Fan Zhang ,  Haitao Xia

IPC: G11B20/18

CPC classification number: G11B5/09 ,  G11B20/10037

Abstract: Methods and systems for estimating MRA for a hard disk drive are described. The methods and systems described herein provide for real time estimating and correcting magneto-resistive head asymmetry (MRA) in a hard disk drive using analog-to-digital convertor (ADC) samples or counts. Generally, ADC outputs may be obtained by injecting MRA at known values, where an estimated MRA may be derived in real time by applying an equation using particular ADC output values. Once an estimated MRA is obtained, MRA correction may be performed when the estimated MRA is larger than a threshold value, such as by adjusting a channel MRA compensation coefficient.

Abstract translation: 描述用于估计硬盘驱动器的MRA的方法和系统。 本文描述的方法和系统提供使用模数转换器（ADC）采样或计数来实时估计和校正硬盘驱动器中的磁阻头不对称（MRA）。 通常，可以通过以已知值注入MRA来获得ADC输出，其中可以通过使用特定ADC输出值应用方程实时导出估计MRA。 一旦获得估计的MRA，当估计的MRA大于阈值时，例如通过调整通道MRA补偿系数，可以执行MRA校正。

公开(公告)号：US08705192B1

公开(公告)日：2014-04-22

申请号：US13650479

申请日：2012-10-12

Applicant: LSI Corporation

Inventor： Fan Zhang ,  Ming Jin ,  Jun Xiao ,  Shaohua Yang

IPC: G11B5/09

CPC classification number: G11B20/10481 ,  G11B5/012 ,  G11B20/10268 ,  G11B20/10527

Abstract: Aspects of the disclosure pertain to a read channel system and method for providing sector prioritization for promoting improved sector processing performance. The system and method, during processing of sectors of data, prioritize each of the sectors for further processing based upon: a global iteration index of each sector, trapping set characteristics of each sector and processing latency of each sector.

Abstract translation: 本公开的方面涉及用于提供扇区优先级以促进改进的扇区处理性能的读信道系统和方法。 该系统和方法在数据扇区的处理期间，根据以下各项对每个扇区进行优先排序：基于每个扇区的全局迭代索引，捕获每个扇区的集合特征以及每个扇区的处理等待时间。

公开(公告)号：US20140104720A1

公开(公告)日：2014-04-17

申请号：US13650479

申请日：2012-10-12

Applicant: LSI CORPORATION

Inventor： Fan Zhang ,  Ming Jin ,  Jun Xiao ,  Shaohua Yang

IPC: G11B5/09

CPC classification number: G11B20/10481 ,  G11B5/012 ,  G11B20/10268 ,  G11B20/10527

Abstract: Aspects of the disclosure pertain to a read channel system and method for providing sector prioritization for promoting improved sector processing performance. The system and method, during processing of sectors of data, prioritize each of the sectors for further processing based upon: a global iteration index of each sector, trapping set characteristics of each sector and processing latency of each sector.

Abstract translation: 本公开的方面涉及用于提供扇区优先级以促进改进的扇区处理性能的读信道系统和方法。 该系统和方法在数据扇区的处理期间，根据以下各项对每个扇区进行优先排序：基于每个扇区的全局迭代索引，捕获每个扇区的集合特征以及每个扇区的处理等待时间。

公开(公告)号：US20140089767A1

公开(公告)日：2014-03-27

申请号：US13626255

申请日：2012-09-25

Applicant: LSI CORPORATION

Inventor： Wu Chang ,  Fan Zhang ,  Yang Han ,  Ming Jin

IPC: H03M13/05

CPC classification number: H03M13/05 ,  H03M13/1108 ,  H03M13/1125 ,  H03M13/1171 ,  H03M13/258 ,  H03M13/2927 ,  H03M13/2948 ,  H03M13/2957 ,  H03M13/2963 ,  H03M13/2975 ,  H03M13/3746 ,  H03M13/3927 ,  H03M13/458 ,  H03M13/612 ,  H03M13/6513

Abstract: The present invention includes generating a tie-breaking metric via a comparative tie-breaking metric training process, monitoring an output of a channel detector in order to identify a tie condition between a first log-likelihood ratio (LLR) value and a second LLR value of a symbol, and upon identifying a tie condition between the first LLR value and the second LLR value of the symbol, applying the generated tie-breaking metric to the symbol in order to assign a hard decision to the symbol.

Abstract translation: 本发明包括通过比较打破中断度量训练过程产生一个断开量度，监视信道检测器的输出，以便识别第一对数似然比（LLR）值和第二LLR值之间的联系条件 并且在识别符号的第一LLR值和第二LLR值之间的系数条件时，将生成的关联度量应用于符号，以便为符号分配硬决定。

公开(公告)号：US08472295B1

公开(公告)日：2013-06-25

申请号：US13646386

申请日：2012-10-05

Applicant: LSI Corporation

Inventor： Ming Jin ,  Jun Xiao ,  Fan Zhang ,  Haitao Xia

IPC: G11B7/00 ,  G11B5/09

CPC classification number: G11B20/1833 ,  G11B20/1217 ,  G11B2020/1232 ,  G11B2020/1843 ,  G11B2020/185 ,  G11B2220/2516

Abstract: The present disclosure is directed to selectively protecting a portion of a track including a plurality of data sectors. The data sectors include a plurality of user sectors and one or more parity sectors. Protected bits are designated in each of the of data sectors. The protected bits are selected to have matching bit indices across the data sectors resulting in a parallel alignment of the protected bits across the user and parity sectors. One or more selections of protected bits of the user sectors are encoded across matching bit indices to generate data values in the corresponding protected bits of the parity sectors. At least one portion of at least one failed sector is recoverable by decoding at least one selection of the protected bits when a sector error occurs at a protected bit.

Abstract translation: 本公开涉及选择性地保护包括多个数据扇区的轨道的一部分。 数据扇区包括多个用户扇区和一个或多个奇偶校验扇区。 保护的位在每个数据扇区中指定。 受保护的比特被选择为在数据扇区之间具有匹配的比特索引，导致跨越用户和奇偶校验扇区的受保护比特的并行对齐。 用户扇区的受保护位的一个或多个选择是跨匹配比特索引编码的，以在奇偶校验扇区的对应保护比特中产生数据值。 当在受保护位发生扇区错误时，至少一个故障扇区的至少一部分可通过解码受保护位的至少一个选择来恢复。