FREE-FLY CLASS D POWER AMPLIFIER
    21.
    发明申请
    FREE-FLY CLASS D POWER AMPLIFIER 有权
    自由飞行类D功率放大器

    公开(公告)号:US20130234795A1

    公开(公告)日:2013-09-12

    申请号:US13416841

    申请日:2012-03-09

    IPC分类号: H03F3/217

    摘要: A method is provided. A first enable signal is asserted so as to enable a first driver, where the first driver has a first output and a first parasitic capacitance. A second enable signal is asserted so as to enable a second driver, where the second driver has a second output and a second parasitic capacitance. The first and second outputs are coupled together by a switching network when the second driver is enabled. Pulses from complementary first and second radio frequency (RF) signals are applied to the first driver, where there is a first set of free-fly intervals between consecutive pulses from the first and second RF signals, and pulses from complementary third and fourth RF signals are applied to the second driver, wherein there is a second set of free-fly interval between consecutive pulses from the third and fourth RF signals.

    摘要翻译: 提供了一种方法。 第一使能信号被确定为使第一驱动器能够使第一驱动器具有第一输出和第一寄生电容。 第二使能信号被确定为使第二驱动器能够启动,其中第二驱动器具有第二输出和第二寄生电容。 当第二驱动器被使能时,第一和第二输出由交换网络耦合在一起。 来自互补第一和第二射频(RF)信号的脉冲被施加到第一驱动器,其中在来自第一和第二RF信号的连续脉冲之间存在第一组自由飞行间隔,以及来自互补的第三和第四RF信号的脉冲 被施加到第二驱动器,其中在来自第三和第四RF信号的连续脉冲之间存在第二组自由间隔。

    Apparatus and method of digital predistortion for power amplifiers with dynamic nonlinearities
    22.
    发明授权
    Apparatus and method of digital predistortion for power amplifiers with dynamic nonlinearities 有权
    具有动态非线性功率放大器的数字预失真装置和方法

    公开(公告)号:US08478210B2

    公开(公告)日:2013-07-02

    申请号:US13104578

    申请日:2011-05-10

    IPC分类号: H04B1/04

    摘要: Power amplifiers (PAs) using a Doherty or other power output level sensitive configuration have been employed for several years in telecommunications (as well as other applications) to take advantage of efficiency gains. For many of these applications, baseband signals are predistorted to compensate for nonlinearities in the PAs, but because there is a “switching event” in a Doherty-type amplifier (for example), the nonlinearities become dynamically varying. As a result, digital predistortion (DPD) becomes increasingly difficult to perform. Here, DPD modules are provided that adapt to changes in dynamically varying PAs based on a determination of the average power or other relevant metric prior to transmission.

    摘要翻译: 使用Doherty或其他功率输出电平敏感配置的功率放大器(PA)在电信(以及其他应用)中已经采用了数年,以利用效率提升。 对于许多这些应用,基带信号被预失真以补偿PA中的非线性,但是由于在Doherty型放大器(例如)中存在“切换事件”,所以非线性变得动态变化。 因此,数字预失真(DPD)变得越来越难以执行。 这里,提供DPD模块,其基于在传输之前的平均功率或其他相关度量的确定来适应动态变化的PA的变化。

    System and Method for Estimating a Transmit Channel Response and/or a Feedback Channel Response Using Frequency Shifting
    23.
    发明申请
    System and Method for Estimating a Transmit Channel Response and/or a Feedback Channel Response Using Frequency Shifting 有权
    用于使用频移来估计发射信道响应和/或反馈信道响应的系统和方法

    公开(公告)号:US20110317786A1

    公开(公告)日:2011-12-29

    申请号:US12823714

    申请日:2010-06-25

    IPC分类号: H04B15/00 H04B17/00

    CPC分类号: H04L27/368 H04L25/0202

    摘要: Systems and methods for identifying a transmission channel response and a feedback channel response from a plurality of composite system responses are disclosed. A plurality of shifted feedback signals are created by shifting a feedback signal frequency by a plurality of first offset values and/or by shifting a transmission signal frequency by a plurality of second offset values. The feedback signals are compared to an input signal to identify the transmission channel response and/or a feedback channel response. A control signal is generated for a pre-distortion circuit to modify the input signal by an inverse of the transmission channel response. The composite system response is measured at a plurality of operating frequencies and at the plurality of offset values. The measurements are stored in a matrix and singular value decomposition is applied to the matrix of measurements to calculate the transmission channel response and feedback channel response.

    摘要翻译: 公开了用于识别传输信道响应和来自多个复合系统响应的反馈信道响应的系统和方法。 通过将反馈信号频率移位多个第一偏移值和/或通过将发送信号频率移位多个第二偏移值来创建多个移位反馈信号。 将反馈信号与输入信号进行比较,以识别传输信道响应和/或反馈信道响应。 产生用于预失真电路的控制信号,以通过传输信道响应的倒数修改输入信号。 在多个工作频率和多个偏移值处测量复合系统响应。 将测量值存储在矩阵中,并将奇异值分解应用于测量矩阵,以计算传输信道响应和反馈信道响应。

    JOINT TRANSMIT AND RECEIVE I/Q IMBALANCE COMPENSATION
    24.
    发明申请
    JOINT TRANSMIT AND RECEIVE I/Q IMBALANCE COMPENSATION 有权
    联合发送和接收I / Q不平等补偿

    公开(公告)号:US20110158297A1

    公开(公告)日:2011-06-30

    申请号:US12648898

    申请日:2009-12-29

    IPC分类号: H04B1/38

    CPC分类号: H04B1/40 H03D3/009

    摘要: Conventional transceivers do provide some compensation for in-phase/quadrature (I/Q) imbalance. However, these techniques do not separately compensate for I/Q imbalance for the transmitter and receiver sides of the transceiver. Here, a transceiver is provided that allows for compensation of I/Q imbalance in the transmitter and receiver irrespective of the other to allow for a more accurate transceiver.

    摘要翻译: 传统的收发器确实为同相/正交(I / Q)不平衡提供了一些补偿。 然而,这些技术不会单独地补偿收发器的发射机和接收机侧的I / Q不平衡。 这里,提供了一种收发器,其允许补偿发射机和接收机中的I / Q不平衡,而不管另一个是允许更准确的收发机。

    Digital Pre-Distortion of Non-Linear Systems with Reduced Bandwidth Feedback
    25.
    发明申请
    Digital Pre-Distortion of Non-Linear Systems with Reduced Bandwidth Feedback 有权
    具有减少带宽反馈的非线性系统的数字预失真

    公开(公告)号:US20110135034A1

    公开(公告)日:2011-06-09

    申请号:US12962369

    申请日:2010-12-07

    IPC分类号: H04L25/49

    摘要: Embodiments of the invention provide a DPD system where the transmit reference signal is transformed, including sub-sampling, frequency translation, and the like, to match the feedback signal, which goes thru a similar transformation process, to obtain an error signal. The same transformation is applied to a system model, which may be Jacobian, Hessian, Gradient, or the like, in an adaptation algorithm to minimize error.

    摘要翻译: 本发明的实施例提供了一种DPD系统,其中发射参考信号被变换,包括子采样,频率转换等,以与通过类似变换过程的反馈信号匹配以获得误差信号。 在适应算法中,将系统模型应用于Jacobian,Hessian,Gradient等系统模型,以使误差最小化。

    SYSTEM AND METHOD FOR ICTAL SOURCE ANALYSIS
    27.
    发明申请
    SYSTEM AND METHOD FOR ICTAL SOURCE ANALYSIS 审中-公开
    用于ICT信源分析的系统和方法

    公开(公告)号:US20100049482A1

    公开(公告)日:2010-02-25

    申请号:US12255324

    申请日:2008-10-21

    申请人: Bin He Lei Ding Yuan Lai

    发明人: Bin He Lei Ding Yuan Lai

    IPC分类号: G06F17/11

    CPC分类号: A61B5/048 A61B5/4094

    摘要: This document discloses, among other things, ictal source analysis and causal interaction estimation which considers the structure of seizures in the space, time, and frequency domains. The dynamic causal interaction can distinguish the primary source, which initiates the ictal activity, from the secondary source, which is generated due to the ictal activity propagation.

    摘要翻译: 本文件公开了其中考虑空间,时间和频域缉获结构的信号源分析和因果相互作用估计。 动态因果相互作用可以区分起源于动作活动的主要来源,这是由于由于传播活动而产生的次要来源。

    Multiprocessor system
    28.
    发明申请
    Multiprocessor system 审中-公开
    多处理器系统

    公开(公告)号:US20070079041A1

    公开(公告)日:2007-04-05

    申请号:US11346247

    申请日:2006-02-03

    IPC分类号: H05K7/10 G06F13/00

    摘要: A multiprocessor system according to this invention comprises a main board, an expansion board, and at least a connection card. The main board comprises a plurality of first processors, such as four (4) CPUs, and at least a first socket. The expansion board comprises a plurality of second processors, such as four (4) CPUs, and at least a second socket. The plurality of first processors selectively communicates with each other by way of a plurality of first processor buses, which may be dual unidirectional point-to-point buses such as HT buses. The plurality of second processors selectively communicates with each other by way of a plurality of second processor buses, which may be dual unidirectional point-to-point buses such as HT bus. The connection card(s) electronically connect(s) to the first socket(s) and the second socket(s) for providing connection between at least one of the first processor of the main board and at least one of the second processor of the expansion board.

    摘要翻译: 根据本发明的多处理器系统包括主板,扩展板和至少一个连接卡。 主板包括多个第一处理器,例如四(4)个CPU以及至少一个第一插座。 扩展板包括多个第二处理器,例如四(4)个CPU,以及至少第二插座。 多个第一处理器通过多个第一处理器总线选择性地彼此通信,其可以是诸如HT总线的双重单向点对点总线。 多个第二处理器通过多个第二处理器总线选择性地进行通信,第二处理器总线可以是诸如HT总线的双重单向点到点总线。 连接卡电连接到第一插座和第二插座,用于提供主板的第一处理器和至少一个第一处理器之间的连接, 扩展板

    Power on reset circuit capable of generating power on reset signal
without fail
    29.
    发明授权
    Power on reset circuit capable of generating power on reset signal without fail 失效
    上电复位电路能够无故障地产生复位信号的电源

    公开(公告)号:US6016068A

    公开(公告)日:2000-01-18

    申请号:US035922

    申请日:1998-03-06

    申请人: Lei Ding

    发明人: Lei Ding

    CPC分类号: H03K17/223

    摘要: A power on reset circuit includes: interconnected first and second inverter circuits; a capacitor connected to an input node of the first inverter circuit; and a buffer circuit responsive to voltage at an output node for generating a power on reset signal. In the power on reset circuit, in order to increase source voltage of an N channel MOS transistor in the second inverter circuit to a voltage higher than ground voltage, a diode-connected transistor is inserted between the source of the transistor and a ground node. Thus, the power on reset circuit never fails to produce the power on reset signal even when power supply voltage is dropped.

    摘要翻译: 上电复位电路包括:互连的第一和第二反相器电路; 连接到所述第一反相器电路的输入节点的电容器; 以及响应于输出节点处的电压以产生上电复位信号的缓冲电路。 在上电复位电路中,为了将第二逆变器电路中的N沟道MOS晶体管的源极电压增加到高于接地电压的电压,将二极管连接的晶体管插入在晶体管的源极和接地节点之间。 因此,即使电源电压下降,上电复位电路也不会产生上电复位信号。