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公开(公告)号：US20190123685A1
公开(公告)日：2019-04-25
申请号：US16225678
申请日：2018-12-19
Applicant: MICRON TECHNOLOGY, INC.
IPC: H03B5/04 , H03K3/011 , H03K3/0231 , H03L1/02 , H03B5/24 , G11C7/10 , H03K3/03 , G11C11/406 , H03K4/502
Abstract: Apparatuses and methods for temperature independent oscillator circuits are disclosed herein. An example apparatus may include a pulse generator circuit configured to provide a periodic pulse based on the charging and discharging and discharging of a capacitor and further based on a reference voltage. The pulse generator circuit may include a capacitor coupled between a first reference voltage and a first node, wherein the capacitor is configured to be charged and discharged through the node in response to the periodic pulse, a resistor and a diode coupled in series between a second node and a second reference voltage, and a comparator coupled to the first and second nodes and configured to provide the periodic pulse based on voltages on the first and second nodes, wherein a period of the periodic pulse is based at least on the resistor and the a current.
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22.发明授权公开(公告)号：US11626152B2
公开(公告)日：2023-04-11
申请号：US17324621
申请日：2021-05-19
Applicant: MICRON TECHNOLOGY, INC.
IPC: G11C16/08 , G11C7/00 , G11C11/406
Abstract: Apparatuses and methods for pure-time, self-adopt sampling for RHR refresh. An example apparatus includes a memory bank comprising a plurality of rows each associated with a respective row address, and a sampling timing generator circuit configured to provide a timing signal having a plurality of pulses. Each of the plurality of pulses is configured to initiate sampling of a respective row address associated with a row of the plurality of rows to detect a row hammer attack. The sampling timing generator includes first circuitry configured to provide a first subset of pulses of the plurality of pulses during a first time period and includes second circuitry configured to initiate provision of a second subset of pulses of the plurality of pulses during a second time period after the first time period.
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公开(公告)号：US20220059153A1
公开(公告)日：2022-02-24
申请号：US16997766
申请日：2020-08-19
Applicant: MICRON TECHNOLOGY, INC.
IPC: G11C11/406
Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for providing refresh logic, such as row hammer refresh circuitry, in a location on a memory die apart from a bank logic region of the memory die. In some examples, at least some of the components of the row hammer refresh circuitry may be shared between banks of the memory.
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公开(公告)号：US11119523B2
公开(公告)日：2021-09-14
申请号：US16146982
申请日：2018-09-28
Applicant: MICRON TECHNOLOGY, INC.
Abstract: A reference voltage generator is disclosed that may provide a plurality of reference voltages. A reference voltage generator may include a voltage divider, a multiplexer coupled to the voltage divider, an operational amplifier that may receive a voltage from the multiplexer, and a plurality of resistors that may receive an output from the operational amplifier. The reference voltages may be provided from output terminals coupled to the resistors. A reference voltage generator may include a voltage divider, two multiplexers coupled to the voltage divider, an operational amplifier coupled to each multiplexer, and a plurality of resistors coupled between the outputs of the two operational amplifiers. Reference voltages may be provided from output terminals coupled to the resistors.
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公开(公告)号：US20200090749A1
公开(公告)日：2020-03-19
申请号：US16135877
申请日：2018-09-19
Applicant: Micron Technology, Inc.
IPC: G11C15/04 , H03K19/177 , H03K19/20
Abstract: A method of operating a memory device may include receiving, during each phase of a row hammer refresh (RHR) interval, at least one row hammer address (RHA) of a content addressable memory (CAM). The method may further include storing, during each phase of the RHR interval, a received RHA of the at least one received RHA in an address register. Moreover, the method may include refreshing each stored RHA of the CAM via a RHR during the RHR interval. Semiconductor devices and an electronic system are also described.
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Patent Agency Ranking
公开(公告)号：US10168724B2
公开(公告)日：2019-01-01
申请号：US14777854
申请日：2015-06-15
Applicant: Micron Technology, Inc.
Abstract: A reference voltage generator is disclosed that may provide a plurality of reference voltages. A reference voltage generator may include a voltage divider, a multiplexer coupled to the voltage divider, an operational amplifier that may receive a voltage from the multiplexer, and a plurality of resistors that may receive an output from the operational amplifier. The reference voltages may be provided from output terminals coupled to the resistors. A reference voltage generator may include a voltage divider, two multiplexers coupled to the voltage divider, an operational amplifier coupled to each multiplexer, and a plurality of resistors coupled between the outputs of the two operational amplifiers. Reference voltages may be provided from output terminals coupled to the resistors.
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公开(公告)号：US20170017252A1
公开(公告)日：2017-01-19
申请号：US14777854
申请日：2015-06-15
Applicant: Micron Technology, Inc.
IPC: G05F3/26
CPC classification number: G05F3/26 , G11C5/147 , G11C7/1084 , G11C7/109 , G11C29/00 , H03M1/68 , H03M1/76 , H03M1/765 , H03M1/808
Abstract: A reference voltage generator is disclosed that may provide a plurality of reference voltages. A reference voltage generator may include a voltage divider, a multiplexer coupled to the voltage divider, an operational amplifier that may receive a voltage from the multiplexer, and a plurality of resistors that may receive an output from the operational amplifier. The reference voltages may be provided from output terminals coupled to the resistors. A reference voltage generator may include a voltage divider, two multiplexers coupled. to the voltage divider, an operational amplifier coupled to each multiplexer, and a plurality of resistors coupled between the outputs of the two operational amplifiers. Reference voltages may be provided from output terminals coupled to the resistors.
Abstract translation: 公开了可以提供多个参考电压的参考电压发生器。 参考电压发生器可以包括分压器，耦合到分压器的多路复用器，可以从多路复用器接收电压的运算放大器以及可以从运算放大器接收输出的多个电阻器。 可以从耦合到电阻器的输出端子提供参考电压。 参考电压发生器可以包括分压器，耦合的两个多路复用器。 耦合到分压器，耦合到每个多路复用器的运算放大器以及耦合在两个运算放大器的输出之间的多个电阻器。 可以从耦合到电阻器的输出端子提供参考电压。
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公开(公告)号：US12056464B2
公开(公告)日：2024-08-06
申请号：US17217861
申请日：2021-03-30
Applicant: Micron Technology, Inc.
IPC: G06F7/58
CPC classification number: G06F7/584
Abstract: Linear-feedback shift registers (LFSRs) for generating bounded random numbers (e.g., random numbers within a narrower range than those generated by a conventional LFSR of the same width) are described. In one embodiment, a bounded LFSR for generating an n-bit value comprises an m-bit LFSR with a range of 2m random numbers and an n−m bit LFSR with a range of 2n-m−1−k random numbers. The bounded LFSR further comprises logic to skip k values from a repeatable sequence of the n−m bit LFSR, which can, for example, be configured during the design of the bounded LFSR. The bounded LFSR provides bounded random numbers based on the outputs of the m-bit LFSR and the n−m bit LFSR. In one embodiment, the bounded random number generated by the bounded LFSR is used as a random address in a row hammer mitigation system.
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公开(公告)号：US20220270670A1
公开(公告)日：2022-08-25
申请号：US17662733
申请日：2022-05-10
Applicant: MICRON TECHNOLOGY, INC.
IPC: G11C11/406 , G11C11/4096 , G11C11/4091 , G11C11/408 , G11C11/402
Abstract: Apparatuses, systems, and methods for refresh modes. A memory may need to perform targeted refresh operations to refresh the ‘victim’ word lines which are near to frequently accessed ‘aggressor’ word lines. To refresh the victims at a high enough rate, it may be desirable to refresh multiple victims as part of the same refresh operation. However, certain word lines (e.g., word lines in a same section or adjacent sections of the memory) cannot be refreshed together. The memory may have a section comparator, which may check stored aggressor addresses and may provide a signal if there are not two stored addresses which can be refreshed together. Based, in part, on the signal, the memory may activate one of several different refresh modes, which may control the types of refresh operation performed responsive to a refresh signal.
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公开(公告)号：US11380382B2
公开(公告)日：2022-07-05
申请号：US16997766
申请日：2020-08-19
Applicant: MICRON TECHNOLOGY, INC.
IPC: G11C11/406
Abstract: Embodiments of the disclosure are drawn to apparatuses, systems, and methods for providing refresh logic, such as row hammer refresh circuitry, in a location on a memory die apart from a bank logic region of the memory die. In some examples, at least some of the components of the row hammer refresh circuitry may be shared between banks of the memory.
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