公开(公告)号：US12072381B2

公开(公告)日：2024-08-27

申请号：US18047386

申请日：2022-10-18

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Kenneth M. Curewitz ,  Jaime Cummins ,  John D. Porter ,  Bryce D. Cook ,  Jeffrey P. Wright

IPC: G01R31/319 ,  G01R31/3185

CPC classification number: G01R31/31907 ,  G01R31/318594 ,  G01R31/318597

Abstract: A memory controller and a physical interface layer may accommodate multiple memory types. In some examples, the memory controller and/or PHY may include a register that includes operating parameters for multiple operating modes. Different operating modes may be compatible with different memory types. In some examples, the memory controller and physical interface may be included in a system for testing multiple memory types. The system may provide multiple interfaces for communicating with the memory. The different communication types may be used for performing different tests and/or simulating different types of devices that may utilize the memory.

公开(公告)号：US20240233870A9

公开(公告)日：2024-07-11

申请号：US18049506

申请日：2022-10-25

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Justin Eno ,  Sean S. Eilert ,  Ameen D. Akel ,  Kenneth M. Curewitz

IPC: G16B30/10 ,  G16B50/00

CPC classification number: G16B30/10 ,  G16B50/00

Abstract: Associative processing memory (APM) may be used to align reads to a reference sequence. The APM may store shifted permutations and/or other permutations of the reference sequence. A read may be compared to some or all of the permutations of the reference sequence and the APM may provide an output for each comparison. In some examples, the APM may compare the read to many permutations of the reference sequence to the read in parallel. Inferences may be made based on the comparisons between the read and the portions and/or permutations of a reference sequence. Based on the inferences, a candidate alignment location in the reference sequence for a read to be determined.

公开(公告)号：US20230214148A1

公开(公告)日：2023-07-06

申请号：US17652229

申请日：2022-02-23

Applicant: Micron Technology, Inc.

Inventor： Sean S. Eilert ,  Kenneth M. Curewitz ,  Helena Caminal ,  Ameen D. Akel

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: Methods, systems, and devices for redundant computing across planes are described. A device may perform a computational operation on first data that is stored in a first plane that includes content-addressable memory cells. The first data may be representative of a set of contiguous bits of a vector. The device may perform, concurrent with performing the computational operation on the first data, the computational operation on second data that is stored in a second plane. The second data may be representative of the set of contiguous bits of the vector. The device may read from the first plane and write to the second plane, third data representative of a result of the computational operation on the first data.

公开(公告)号：US20170351737A1

公开(公告)日：2017-12-07

申请号：US15685950

申请日：2017-08-24

Applicant: Micron Technology, Inc.

Inventor： Kenneth M. Curewitz ,  Sean Eilert ,  Hongyu Wang ,  Ameen D. Akel

IPC: G06F17/30

CPC classification number: G06F16/24569

Abstract: Methods and systems operate to receive a plurality of search requests for searching a database in a memory system. The search requests can be stored in a FIFO queue and searches can be subsequently generated for each search request. The resulting plurality of searches can be executed substantially in parallel on the database. A respective indication is transmitted to a requesting host when either each respective search is complete or each respective search has generated search results.