公开(公告)号：US20250165762A1

公开(公告)日：2025-05-22

申请号：US19019737

申请日：2025-01-14

Applicant: Micron Technology, Inc.

Inventor： Dmitri Yudanov ,  Sean S. Eilert ,  Hernan A. Castro ,  Ameen D. Akel

IPC: G06N3/063 ,  G06N3/049 ,  G06N3/084 ,  G06N5/046 ,  G11C11/4063 ,  G11C11/54

Abstract: Systems and methods are disclosed. A system may include a number of memory arrays and circuitry coupled to the number of memory arrays. The circuitry may store synaptic connections of a destination neuron in a first memory array of the number of memory arrays. The circuitry may also store pre-synaptic spike events from respective source neurons in a second memory array of the number of memory arrays. In response to a match of a neuron identification of the synaptic connections of the destination neuron with a neuron identification of the source neurons, the circuitry may generate a signal. The circuitry may further drive, based on the signal, at least one word line of a third memory array of the number of memory arrays.

公开(公告)号：US20250124981A1

公开(公告)日：2025-04-17

申请号：US18999983

申请日：2024-12-23

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Justin Eno ,  Sean S. Eilert ,  Ameen D. Akel ,  Kenneth M. Curewitz

IPC: G11C13/00 ,  C12Q1/6869 ,  G11C7/16 ,  G16B30/10

Abstract: A memory device may be used to implement a Bloom filter. In some examples, the memory device may include a memory array to perform a multiply-accumulate operation to implement the Bloom filter. The memory device may store multiple portions of a reference genetic sequence in the memory array and compare the portions of the reference genetic sequence to a read sequence in parallel by performing the multiply-accumulate operation. The results of the multiply-accumulate operation between the read sequence and the portions of the reference genetic sequence may be used to determine where the read sequence aligns to the reference sequence.

公开(公告)号：US20250104761A1

公开(公告)日：2025-03-27

申请号：US18971871

申请日：2024-12-06

Applicant: Micron Technology, Inc.

Inventor： Sean S. Eilert ,  Glen E. Hush ,  Aliasger T. Zaidy ,  Kunal R. Parekh

IPC: G11C11/4093 ,  G06F3/06 ,  G06F13/16 ,  G06F13/28 ,  G11C7/08 ,  G11C7/10 ,  G11C11/408 ,  G11C11/4091 ,  G11C11/4096 ,  G16B30/00 ,  G16B50/10 ,  H01L21/66 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

Abstract: A memory device includes a memory die bonded to a logic die via a wafer-on-wafer bond. A controller of the memory device that is coupled to the memory die can activate a row of the memory die. Responsive to activating the row, a sense amplifier stripe of the memory die can latch a first plurality of signals. A transceiver can route a second plurality of signals from the sense amplifier stripe to the logic die.

公开(公告)号：US12217796B2

公开(公告)日：2025-02-04

申请号：US17931277

申请日：2022-09-12

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Justin Eno ,  Sean S. Eilert ,  Ameen D. Akel ,  Kenneth M. Curewitz

IPC: G11C13/00 ,  C12Q1/6869 ,  G11C7/16 ,  G16B30/10

Abstract: A memory device may be used to implement a Bloom filter. In some examples, the memory device may include a memory array to perform a multiply-accumulate operation to implement the Bloom filter. The memory device may store multiple portions of a reference genetic sequence in the memory array and compare the portions of the reference genetic sequence to a read sequence in parallel by performing the multiply-accumulate operation. The results of the multiply-accumulate operation between the read sequence and the portions of the reference genetic sequence may be used to determine where the read sequence aligns to the reference sequence.

公开(公告)号：US12165696B2

公开(公告)日：2024-12-10

申请号：US17830981

申请日：2022-06-02

Applicant: Micron Technology, Inc.

Inventor： Sean S. Eilert ,  Glen E. Hush ,  Aliasger T. Zaidy ,  Kunal R. Parekh

IPC: G11C7/10 ,  G06F3/06 ,  G06F13/16 ,  G06F13/28 ,  G11C7/08 ,  G11C11/408 ,  G11C11/4091 ,  G11C11/4093 ,  G11C11/4096 ,  G16B30/00 ,  G16B50/10 ,  H01L21/66 ,  H01L21/78 ,  H01L23/00 ,  H01L25/00 ,  H01L25/065 ,  H01L25/18

Abstract: A memory device includes a memory die bonded to a logic die via a wafer-on-wafer bond. A controller of the memory device that is coupled to the memory die can activate a row of the memory die. Responsive to activating the row, a sense amplifier stripe of the memory die can latch a first plurality of signals. A transceiver can route a second plurality of signals from the sense amplifier stripe to the logic die.

公开(公告)号：US20240362115A1

公开(公告)日：2024-10-31

申请号：US18733319

申请日：2024-06-04

Applicant: Micron Technology, Inc.

Inventor： Justin Eno ,  William A. Melton ,  Sean S. Eilert

IPC: G06F11/10 ,  G06F11/07 ,  G06F11/30

CPC classification number: G06F11/1068 ,  G06F11/073 ,  G06F11/076 ,  G06F11/0772 ,  G06F11/1064 ,  G06F11/3037

Abstract: Methods, systems, and devices for adaptive parity techniques for a memory device are described. An apparatus, such as a memory device, may use one or more error correction code (ECC) schemes, an error cache, or both to support access operations. The memory device may receive a command from a host device to read or write data. If the error cache includes an entry for the data, the memory device may read or write the data using a first ECC scheme. If the error cache does not include an entry for the data, the memory device may read or write the data without using an ECC scheme or using a second ECC scheme different than the first ECC scheme.

公开(公告)号：US20240281167A1

公开(公告)日：2024-08-22

申请号：US18649465

申请日：2024-04-29

Applicant: Micron Technology, Inc.

Inventor： Sean S. Eilert ,  Ameen D. Akel ,  Justin Eno ,  Brian Hirano

IPC: G06F3/06

CPC classification number: G06F3/0655 ,  G06F3/0604 ,  G06F3/0679

Abstract: Methods, systems, and devices for in-memory associative processing for vectors are described. A device may perform a computational operation on a first set of contiguous bits of a first vector and a first set of contiguous bits of a second vector. The first sets of contiguous bits may be stored in a first plane of a memory die and the computational operation may be based on a truth table for the computational operation. The device may perform a second computational operation on a second set of contiguous bits of the first vector and a second set of contiguous bits of the second vector. The second sets of contiguous bits may be stored in a second plane of the memory die and the computational operation based on the truth table for the computational operation.

公开(公告)号：US12056599B2

公开(公告)日：2024-08-06

申请号：US18061005

申请日：2022-12-02

Applicant: Micron Technology, Inc.

Inventor： Dmitri Yudanov ,  Sean S. Eilert ,  Hernan A. Castro ,  William A. Melton

IPC: G06N3/00 ,  G06F3/06 ,  G06N3/04 ,  G06N3/063 ,  G11C7/06 ,  G11C8/08 ,  G11C11/54 ,  H03M1/46

CPC classification number: G06N3/063 ,  G06F3/0604 ,  G06F3/0661 ,  G06F3/0673 ,  G06N3/04 ,  G11C7/06 ,  G11C8/08 ,  G11C11/54 ,  H03M1/46

Abstract: Methods, apparatuses, and systems for in-or near-memory processing are described. Bits of a first number may be stored on a number of memory elements, wherein each memory element of the number of memory elements intersects a bit line and a word line of a number of word lines. A number of signals corresponding to bits of a second number may be driven on the number of word lines to generate a number of output signals. A value equal to a product of the first number and the second number may be generated based on the number of output signals.

公开(公告)号：US20240136016A1

公开(公告)日：2024-04-25

申请号：US18049506

申请日：2022-10-24

Applicant: MICRON TECHNOLOGY, INC.

Inventor： Justin Eno ,  Sean S. Eilert ,  Ameen D. Akel ,  Kenneth M. Curewitz

IPC: G16B30/10 ,  G16B50/00

CPC classification number: G16B30/10 ,  G16B50/00

Abstract: Associative processing memory (APM) may be used to align reads to a reference sequence. The APM may store shifted permutations and/or other permutations of the reference sequence. A read may be compared to some or all of the permutations of the reference sequence and the APM may provide an output for each comparison. In some examples, the APM may compare the read to many permutations of the reference sequence to the read in parallel. Inferences may be made based on the comparisons between the read and the portions and/or permutations of a reference sequence. Based on the inferences, a candidate alignment location in the reference sequence for a read to be determined.

公开(公告)号：US11915742B2

公开(公告)日：2024-02-27

申请号：US17885242

申请日：2022-08-10

Applicant: Micron Technology, Inc.

Inventor： Sean S. Eilert ,  Kunal R. Parekh ,  Aliasger T. Zaidy ,  Glen E. Hush

IPC: G06F13/00 ,  G11C11/4093 ,  G06F13/16 ,  G06F3/06 ,  G11C11/4096 ,  H01L23/00 ,  H01L25/065 ,  H01L21/78 ,  H01L21/66 ,  H01L25/18 ,  H01L25/00 ,  G11C7/08 ,  G11C7/10 ,  G11C11/408 ,  G11C11/4091 ,  G16B50/10 ,  G16B30/00 ,  G06F13/28

CPC classification number: G11C11/4093 ,  G06F3/0656 ,  G06F13/1673 ,  G06F13/28 ,  G11C7/08 ,  G11C7/1039 ,  G11C11/4087 ,  G11C11/4091 ,  G11C11/4096 ,  G16B30/00 ,  G16B50/10 ,  H01L21/78 ,  H01L22/12 ,  H01L24/08 ,  H01L24/48 ,  H01L24/80 ,  H01L25/0652 ,  H01L25/0657 ,  H01L25/18 ,  H01L25/50 ,  G06F2213/28 ,  H01L24/16 ,  H01L2224/0801 ,  H01L2224/08145 ,  H01L2224/1601 ,  H01L2224/16221 ,  H01L2224/48091 ,  H01L2224/48145 ,  H01L2224/48221 ,  H01L2224/80895 ,  H01L2224/80896 ,  H01L2225/06517 ,  H01L2225/06524 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06565 ,  H01L2225/06589 ,  H01L2924/1431 ,  H01L2924/1436 ,  H01L2924/14335

Abstract: A wafer-on-wafer formed memory and logic device can enable high bandwidth transmission of data directly between a memory die and a logic die. A logic die that is bonded to a memory die via a wafer-on-wafer bonding process can receive signals indicative of a genetic sequence from the memory die and through a wafer-on-wafer bond. The logic die can also perform a genome annotation lotic operation to attach biological information to the genetic sequence. An annotated genetic sequence can be provided as an output.