SECURE CONTROLLER FOR BLOCK ORIENTED STORAGE
    21.
    发明申请
    SECURE CONTROLLER FOR BLOCK ORIENTED STORAGE 有权
    面向面向存储的安全控制器

    公开(公告)号:US20110154480A1

    公开(公告)日:2011-06-23

    申请号:US13041379

    申请日:2011-03-05

    CPC classification number: G06F21/74 G06F21/79

    Abstract: A storage controller includes a command pointer register. The command pointer register points to a chain of commands in memory, and also includes a security status field to indicate a security status of the first command in the command chain. Each command in the command chain may also include a security status field that indicates the security status of the following command in the chain.

    Abstract translation: 存储控制器包括命令指针寄存器。 命令指针寄存器指向存储器中的一系列命令,并且还包括用于指示命令链中的第一命令的安全状态的安全状态字段。 命令链中的每个命令还可以包括指示链中以下命令的安全状态的安全状态字段。

    SECURITY FOR CODES RUNNING IN NON-TRUSTED DOMAINS IN A PROCESSOR CORE
    22.
    发明申请
    SECURITY FOR CODES RUNNING IN NON-TRUSTED DOMAINS IN A PROCESSOR CORE 失效
    在处理器核心中的非信任域中运行代码的安全性

    公开(公告)号:US20110126265A1

    公开(公告)日:2011-05-26

    申请号:US12026840

    申请日:2008-02-06

    CPC classification number: H04L63/10 G06F21/53 G06F21/54 G06F21/74

    Abstract: A method and apparatus configure a trusted domain and a plurality of isolated domains in a processor core. Each isolated domain is assigned a unique domain identifier. One or more resources are associated with each isolated domain. The associations are stored as permissions to access physical addresses of resources. Code to be executed by a hardware device is assigned to one of the isolated domains. The domain identifier for the assigned isolated domain is written to the hardware device. When the hardware device executes the code, each instruction is logically tagged with the domain identifier written to the hardware device. An instruction includes request to access a physical address. The hardware device compares the domain identifier of the instruction with the permissions. If the permissions allow the domain identifier to access the physical address, then access to the resource at the physical address is allowed. Access is otherwise blocked.

    Abstract translation: 方法和装置在处理器核心中配置可信域和多个隔离域。 每个隔离域都被分配一个唯一的域标识符。 一个或多个资源与每个孤立的域相关联。 这些关联被存储为访问资源的物理地址的权限。 要由硬件设备执行的代码被分配给一个隔离的域。 分配的隔离域的域标识符写入硬件设备。 当硬件设备执行代码时,每个指令都用写入硬件设备的域标识符进行逻辑标记。 指令包括访问物理地址的请求。 硬件设备将指令的域标识与权限进行比较。 如果权限允许域标识符访问物理地址,则允许访问物理地址上的资源。 访问被阻止。

    Programmable transaction initiator architecture for systems with secure and non-secure modes
    23.
    发明授权
    Programmable transaction initiator architecture for systems with secure and non-secure modes 失效
    具有安全和非安全模式的系统的可编程事务发起方架构

    公开(公告)号:US07565464B2

    公开(公告)日:2009-07-21

    申请号:US11013217

    申请日:2004-12-14

    CPC classification number: G06F21/79 G06F13/28 G06F21/71 G06F2221/2105

    Abstract: A wireless device dynamically programs a control register for a command-chain driven DMA device. The control register stores a beginning address of the linked list of commands and a secure bit. The secure bit is set if the transaction writing register is secure and a bit in the data being written into the register is set. DMA devices and other bus-mastering peripherals perform tasks described via a command chain that has access to secure resources when the processor is operating in the secure mode and the secure bit is set.

    Abstract translation: 无线设备动态地编程用于命令链驱动的DMA设备的控制寄存器。 控制寄存器存储命令链表和安全位的起始地址。 如果事务处理写入寄存器是安全的并且被写入寄存器的数据中的位被置位,则安全位置1。 DMA设备和其他总线控制外设执行通过命令链描述的任务,当处理器以安全模式运行并且安全位置1时,可以访问安全资源。

    Secure controller for block oriented storage
    25.
    发明授权
    Secure controller for block oriented storage 有权
    面向面向存储的安全控制器

    公开(公告)号:US08448239B2

    公开(公告)日:2013-05-21

    申请号:US13041379

    申请日:2011-03-05

    CPC classification number: G06F21/74 G06F21/79

    Abstract: A storage controller includes a command pointer register. The command pointer register points to a chain of commands in memory, and also includes a security status field to indicate a security status of the first command in the command chain. Each command in the command chain may also include a security status field that indicates the security status of the following command in the chain.

    Abstract translation: 存储控制器包括命令指针寄存器。 命令指针寄存器指向存储器中的一系列命令,并且还包括用于指示命令链中的第一命令的安全状态的安全状态字段。 命令链中的每个命令还可以包括指示链中以下命令的安全状态的安全状态字段。

    Modular integrated circuit with uniform address mapping
    26.
    发明授权
    Modular integrated circuit with uniform address mapping 有权
    具有统一地址映射的模块化集成电路

    公开(公告)号:US08417930B2

    公开(公告)日:2013-04-09

    申请号:US12767208

    申请日:2010-04-26

    Abstract: A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. A memory module stores hub software and hub data and configuration data. The hub software operates in accordance with a memory map that includes a plurality of first reserved blocks corresponding to memory reserved for the plurality of spoke modules, and at least one second reserved block corresponding to memory reserved for at least one optional spoke module. The plurality of first reserved blocks are activated based on the configuration data and the at least one second reserved block is deactivated based on the configuration data.

    Abstract translation: 模块化集成电路包括经由多个集线器接口耦合到多个辐条模块的集线器模块。 存储器模块存储集线器软件和集线器数据和配置数据。 集线器软件根据存储器映射进行操作,存储器映射包括与为多个辐条模块保留的存储器相对应的多个第一保留块,以及对应于至少一个可选辐条模块保留的存储器的至少一个第二保留块。 基于配置数据激活多个第一保留块,并且基于配置数据停用至少一个第二保留块。

    Modular integrated circuit with common software
    27.
    发明授权
    Modular integrated circuit with common software 有权
    具有通用软件的模块化集成电路

    公开(公告)号:US08392696B2

    公开(公告)日:2013-03-05

    申请号:US12767201

    申请日:2010-04-26

    Abstract: A modular integrated circuit includes a hub module that is coupled to a plurality of spoke modules via a plurality of hub interfaces. The spoke modules include a plurality of interface circuits each having a hardware address. A memory module stores the hub software and hub data and configuration data. The hub software includes a plurality of driver modules corresponding to the plurality of interface circuits. The processing module executes boot firmware to configure the plurality of driver modules based on the hardware address of each of the plurality of interface circuits.

    Abstract translation: 模块化集成电路包括经由多个集线器接口耦合到多个辐条模块的集线器模块。 辐条模块包括多个具有硬件地址的接口电路。 存储器模块存储集线器软件和集线器数据和配置数据。 集线器软件包括对应于多个接口电路的多个驱动器模块。 处理模块基于多个接口电路中的每一个的硬件地址执行引导固件以配置多个驱动器模块。

    Method for supporting multiple devices on a high speed physical link
    28.
    发明授权
    Method for supporting multiple devices on a high speed physical link 有权
    用于在高速物理链路上支持多个设备的方法

    公开(公告)号:US08335229B1

    公开(公告)日:2012-12-18

    申请号:US12700100

    申请日:2010-02-04

    CPC classification number: G06F13/4226 G06F13/36

    Abstract: In some embodiments, a method for supporting multiple devices on a high speed physical link may be described. An embedded device may assert a link request pin to request to transmit data on a multi-point communications link that may serve a plurality of embedded devices. A controlling device may receive the link request signal. When the controlling device finishes sending data on the link, it may address the plurality of embedded devices in a round robin format and may determine which device asserted the link request pin. The embedded device that asserted the link request pin may send an acknowledgement signal to the controlling device when it is addressed.

    Abstract translation: 在一些实施例中,可以描述用于支持高速物理链路上的多个设备的方法。 嵌入式设备可以断言链路请求引脚以请求在可以服务于多个嵌入式设备的多点通信链路上传输数据。 控制装置可以接收链路请求信号。 当控制装置在链路上完成发送数据时,它可以以循环格式对多个嵌入式设备进行寻址,并且可以确定哪个设备断言了链路请求引脚。 断言链接请求引脚的嵌入式设备在寻址时可以向控制设备发送确认信号。

    System and method for peripheral device communications
    29.
    发明授权
    System and method for peripheral device communications 有权
    用于外围设备通信的系统和方法

    公开(公告)号:US08127053B1

    公开(公告)日:2012-02-28

    申请号:US12917390

    申请日:2010-11-01

    CPC classification number: G06F13/28

    Abstract: A host device includes a peripheral control module that includes a first memory register that receives data from a first memory and a direct memory access (DMA) module that communicates with the first memory. The host device also includes a host control module that receives data from the first memory. The host device also includes a DMA control module that communicates with the first memory register, the host control module and a second memory that includes a first memory array. The DMA control module compares contents of the first memory array to contents of the memory register and controls transfers of data from the first memory to the peripheral control module based on the comparison.

    Abstract translation: 主机设备包括外围控制模块,其包括从第一存储器接收数据的第一存储器寄存器和与第一存储器通信的直接存储器访问(DMA)模块。 主机设备还包括从第一存储器接收数据的主机控制模块。 主机设备还包括与第一存储器寄存器,主机控制模块和包括第一存储器阵列的第二存储器通信的DMA控制模块。 DMA控制模块将第一存储器阵列的内容与存储器寄存器的内容进行比较,并且基于比较控制从第一存储器到外围控制模块的数据传输。

    Secure controller for block oriented storage
    30.
    发明授权
    Secure controller for block oriented storage 有权
    面向面向存储的安全控制器

    公开(公告)号:US07904943B2

    公开(公告)日:2011-03-08

    申请号:US11027913

    申请日:2004-12-28

    CPC classification number: G06F21/74 G06F21/79

    Abstract: A storage controller includes a command pointer register. The command pointer register points to a chain of commands in memory, and also includes a security status field to indicate a security status of the first command in the command chain. Each command in the command chain may also include a security status field that indicates the security status of the following command in the chain.

    Abstract translation: 存储控制器包括命令指针寄存器。 命令指针寄存器指向存储器中的一系列命令,并且还包括用于指示命令链中的第一命令的安全状态的安全状态字段。 命令链中的每个命令还可以包括指示链中以下命令的安全状态的安全状态字段。

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