利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

27 条记录 (耗时 0.024 秒)

    Memory circuit with quantum well-type carrier storage
    21.
    发明授权
    Memory circuit with quantum well-type carrier storage 失效
    具有量子阱型存储器的存储电路

    公开(公告)号：US08064239B2

    公开(公告)日：2011-11-22

    申请号：US12617352

    申请日：2009-11-12

    申请人： Mehmet Günhan Ertosun ,  Krishna Chandra Saraswat ,  Pawan Kapur

    发明人： Mehmet Günhan Ertosun ,  Krishna Chandra Saraswat ,  Pawan Kapur

    IPC分类号： G11C17/00

    CPC分类号： G11C11/404 ,  B82Y10/00 ,  G11C2211/4016 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/7841

    摘要： Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.

    摘要翻译： 数据存储在具有双门控制的量子阱型结构中。 根据示例实施例，基于晶体管的数据存储电路包括栅极，背栅极和栅极与后栅极之间的半导体沟道。 响应于施加到门和后门的偏压，载体存储在通道中的存储袋结构中。 感测通过通道的电流，并用于检测存储的载波，并相应地检测存储电路的存储状态。

    Device and approach for integration of optical devices and waveguides therefor
    22.
    发明授权
    Device and approach for integration of optical devices and waveguides therefor 失效
    用于集成光学器件和波导的器件和方法

    公开(公告)号：US07418166B1

    公开(公告)日：2008-08-26

    申请号：US11710624

    申请日：2007-02-23

    申请人： Pawan Kapur ,  Yu-Hsuan Kuo ,  Michael West Wiemer ,  David A. B. Miller

    发明人： Pawan Kapur ,  Yu-Hsuan Kuo ,  Michael West Wiemer ,  David A. B. Miller

    IPC分类号： G02B6/12 ,  G02B6/10

    CPC分类号： G02B6/12004 ,  G02B6/12007

    摘要： Optical devices having integrated waveguide and active areas are realized using a crystallization approach involving the inhibition of defects typically associated with liquid-phase crystalline growth of lattice mismatched materials. According to one example embodiment, a growth region is formed such that the region is isolated from a silicon portion of silicon material. The region extends from a silicon-based seeding area of the substrate. A semiconductor material is deposited on a Silicon-based seeding area and in the growth region. A single crystalline material is formed from the deposited semiconductor material by heating and cooling the deposited semiconductor material while directing growth of the semiconductor material from the Silicon-based seeding area and through an opening sufficiently narrow to mitigate crystalline defects. A light-communicating device is formed by etching the silicon material over an insulator layer and etching the single crystalline material.

    摘要翻译： 具有集成波导和有源区域的光学器件使用结晶方法实现，该方法涉及抑制通常与晶格失配材料的液相晶体生长相关的缺陷。 根据一个示例性实施例，形成生长区域使得该区域与硅材料的硅部分隔离。 该区域从基底的硅基接种区延伸。 半导体材料沉积在硅基种植区域和生长区域中。 通过加热和冷却沉积的半导体材料，同时引导半导体材料从硅基接种区域的生长并通过足够窄的开口以减轻晶体缺陷，由沉积的半导体材料形成单晶材料。 通过在绝缘体层上蚀刻硅材料并蚀刻单晶材料形成光通信装置。

    MEMORY CIRCUIT WITH QUANTUM WELL-TYPE CARRIER STORAGE
    23.
    发明申请
    MEMORY CIRCUIT WITH QUANTUM WELL-TYPE CARRIER STORAGE 失效
    具有量子式存储器的存储器电路存储器

    公开(公告)号：US20100149864A1

    公开(公告)日：2010-06-17

    申请号：US12617352

    申请日：2009-11-12

    申请人： Mehmet Günhan Ertosun ,  Krishna Chandra Saraswat ,  Pawan Kapur

    发明人： Mehmet Günhan Ertosun ,  Krishna Chandra Saraswat ,  Pawan Kapur

    IPC分类号： G11C11/34 ,  H01L29/78 ,  G11C7/00

    CPC分类号： G11C11/404 ,  B82Y10/00 ,  G11C2211/4016 ,  H01L27/108 ,  H01L27/10802 ,  H01L29/7841

    摘要： Data is stored in a quantum-well type structure with double gate control. According to an example embodiment, a transistor-based data storage circuit includes a gate, a back gate and a semiconductor channel between the gate and the back gate. Carriers are stored in a storage pocket structure in the channel, in response to biases applied to the gate and back gate. Current passing through the channel is sensed and used to detect the stored carriers and, correspondingly, a memory state of the storage circuit.

    摘要翻译： 数据存储在具有双门控制的量子阱型结构中。 根据示例实施例，基于晶体管的数据存储电路包括栅极，背栅极和栅极与后栅极之间的半导体沟道。 响应于施加到门和后门的偏压，载体存储在通道中的存储袋结构中。 感测通过通道的电流，并用于检测存储的载波，并相应地检测存储电路的存储状态。

    SILICON COMPATIBLE INTEGRATED LIGHT COMMUNICATOR
    24.
    发明申请
    SILICON COMPATIBLE INTEGRATED LIGHT COMMUNICATOR 失效
    SILICON兼容集成光通信器

    公开(公告)号：US20080272391A1

    公开(公告)日：2008-11-06

    申请号：US12057959

    申请日：2008-03-28

    申请人： Pawan Kapur ,  Michael West Wiemer

    发明人： Pawan Kapur ,  Michael West Wiemer

    IPC分类号： H01L33/00 ,  H01L31/0336

    CPC分类号： H01L33/34 ,  H01L21/02532 ,  H01L21/02636 ,  H01L27/15 ,  H01L31/105 ,  H01L31/1085 ,  H01L33/20 ,  H01L33/46

    摘要： Various methods and devices are implemented using efficient silicon compatible integrated light communicators. According to one embodiment of the present invention, a semiconductor device is implemented for communicating light, such as by detecting, modulating or emitting light. The device has a silicon-seeding location, an insulator layer and a second layer on the insulator layer. The second layer includes a silicon-on-insulator region and an active region surrounded by the silicon-on-insulator region and connected to the silicon-seeding location. The active region includes a single-crystalline germanium-based material that extends from the silicon-seeding location through a passageway with a cross-sectional area that is sufficiently small to mitigate crystalline growth defects. The single-crystalline germanium-based material is physically coupled to the insulating layer such that the insulating layer introduces a high tensile strain to the germanium-based material, and a more specific aspect is directed to an SOI implementation.

    摘要翻译： 使用有效的硅兼容集成光通信器实现各种方法和设备。 根据本发明的一个实施例，实现了用于通过检测，调制或发射光来传送光的半导体器件。 该器件具有硅接种位置，绝缘体层和绝缘体层上的第二层。 第二层包括绝缘体上硅区域和被绝缘体上硅区域包围并连接到硅播种位置的有源区域。 活性区域包括从硅接种位置延伸通过具有足够小的横截面积以减轻结晶生长缺陷的通道的单晶锗基材料。 单晶锗基材料物理耦合到绝缘层，使得绝缘层向基于锗的材料引入高拉伸应变，更具体的方面针对SOI实现。

    Silicon compatible integrated light communicator
    26.
    发明授权
    Silicon compatible integrated light communicator 失效
    硅兼容集成光通信器

    公开(公告)号：US07875522B2

    公开(公告)日：2011-01-25

    申请号：US12057959

    申请日：2008-03-28

    申请人： Pawan Kapur ,  Michael West Wiemer

    发明人： Pawan Kapur ,  Michael West Wiemer

    IPC分类号： H01L21/331

    CPC分类号： H01L33/34 ,  H01L21/02532 ,  H01L21/02636 ,  H01L27/15 ,  H01L31/105 ,  H01L31/1085 ,  H01L33/20 ,  H01L33/46

    摘要： Various methods and devices are implemented using efficient silicon compatible integrated light communicators. According to one embodiment of the present invention, a semiconductor device is implemented for communicating light, such as by detecting, modulating or emitting light. The device has a silicon-seeding location, an insulator layer and a second layer on the insulator layer. The second layer includes a silicon-on-insulator region and an active region surrounded by the silicon-on-insulator region and connected to the silicon-seeding location. The active region includes a single-crystalline germanium-based material that extends from the silicon-seeding location through a passageway with a cross-sectional area that is sufficiently small to mitigate crystalline growth defects. The single-crystalline germanium-based material is physically coupled to the insulating layer such that the insulating layer introduces a high tensile strain to the germanium-based material, and a more specific aspect is directed to an SOI implementation.

    摘要翻译： 使用有效的硅兼容集成光通信器实现各种方法和设备。 根据本发明的一个实施例，实现了用于通过检测，调制或发射光来传送光的半导体器件。 该器件具有硅接种位置，绝缘体层和绝缘体层上的第二层。 第二层包括绝缘体上硅区域和被绝缘体上硅区域包围并连接到硅播种位置的有源区域。 活性区域包括从硅接种位置延伸通过具有足够小的横截面积以减轻结晶生长缺陷的通道的单晶锗基材料。 单晶锗基材料物理耦合到绝缘层，使得绝缘层向基于锗的材料引入高拉伸应变，更具体的方面针对SOI实现。