公开(公告)号：US20210216130A1

公开(公告)日：2021-07-15

申请号：US16740293

申请日：2020-01-10

Applicant: Micron Technology, Inc.

Inventor： Baekkyu Choi ,  Thomas H. Kinsley ,  Fuad Badrieh

IPC: G06F1/3225

Abstract: A memory device may include a pin for communicating feedback regarding a supply voltage to a power management component, such as a power management integrated circuit (PMIC). The memory device may bias the pin to a first voltage indicating that a supply voltage is within a target range. The memory device may subsequently determine that a supply voltage is outside the target range and transition the voltage at the pin from the first voltage to a second voltage indicating that the supply voltage is outside the target range. The memory device may select the second voltage based on whether the supply voltage is above or below the target range.

公开(公告)号：US20200310521A1

公开(公告)日：2020-10-01

申请号：US16863968

申请日：2020-04-30

Applicant: Micron Technology, Inc.

Inventor： Fuad Badrieh ,  Baekkyu Choi ,  Thomas H. Kinsley

IPC: G06F1/3225 ,  G06F1/3234 ,  G06F3/06

Abstract: Methods, systems, and devices for predictive power management are described. Correlations may be identified between a set of commands performed at the memory device and oscillating voltage patterns, or a resonance frequency, or both. Voltages may be monitored by the memory device and be compared to the identified voltage pattern to mitigate undesirable oscillating voltages and resonance frequency.

公开(公告)号：US20200251150A1

公开(公告)日：2020-08-06

申请号：US16268092

申请日：2019-02-05

Applicant: Micron Technology, Inc.

Inventor： Fuad Badrieh ,  Thomas H. Kinsley ,  Baekkyu Choi

IPC: G11C5/06 ,  G11C11/22 ,  G11C11/4091 ,  G06F13/16

Abstract: Methods and devices for dynamic allocation of a capacitive component in a memory device are described. A memory device may include one or more voltage rails for distributing supply voltages to a memory die. A memory device may include a capacitive component that may be dynamically coupled to a voltage rail based on an identification of an operating condition on the memory die, such as a voltage droop on the voltage rail. The capacitive component may be dynamically coupled with the voltage rail to maintain the supply voltage on the voltage rail during periods of high demand. The capacitive component may be dynamically switched between voltage rails during operation of the memory device based on operating conditions associated with the voltage rails.

公开(公告)号：US10170448B2

公开(公告)日：2019-01-01

申请号：US15372246

申请日：2016-12-07

Applicant: Micron Technology, Inc.

Inventor： Adam S. El-Mansouri ,  Fuad Badrieh ,  Brent Keeth

IPC: H01L25/065 ,  G05F1/10

Abstract: Apparatuses for supplying power supply voltage in a plurality of dies are described. An example apparatus includes: a circuit board; a regulator on the circuit board that regulates a first voltage; a semiconductor device on the circuit board that receives the first voltage through a power line in the circuit board. The semiconductor device includes: a substrate on the circuit board, stacked via conductive balls, that receives the first voltage from the power line via the conductive balls; a plurality of dies on the semiconductor device, stacked via bumps, each die including a first conductive via that receives the first voltage via the bumps; a plurality of pillars between adjacent dies and couple the first conductive vias of the adjacent dies; and a sense node switch circuit that selectively couples one first conductive via of one die among the plurality of dies to the regulator.

公开(公告)号：US11921560B2

公开(公告)日：2024-03-05

申请号：US18084149

申请日：2022-12-19

Applicant: Micron Technology, Inc.

Inventor： Thomas H. Kinsley ,  Baekkyu Choi ,  Fuad Badrieh

IPC: G06F1/32 ,  G06F1/3225

CPC classification number: G06F1/3225

Abstract: Methods, systems, and devices for memory device power management are described. An apparatus may include a memory die that includes a power management circuit. The power management circuit may provide a voltage for operating one or more memory dies of the apparatus based on a supply voltage received by the memory die. The second voltage may be distributed to the one or more other memory dies in the apparatus.

公开(公告)号：US11775199B2

公开(公告)日：2023-10-03

申请号：US17153519

申请日：2021-01-20

Applicant: Micron Technology, Inc.

Inventor： Fuad Badrieh

IPC: G11C11/4074 ,  G06F3/06 ,  G11C5/14 ,  G11C11/22 ,  G11C16/22

CPC classification number: G06F3/0653 ,  G06F3/0625 ,  G06F3/0679 ,  G11C5/143 ,  G11C11/225 ,  G11C16/225

Abstract: A voltage of a conductive line, such as a control line, a data line, or a voltage supply line associated with a memory die may be monitored. A frequency response of the voltage may be analyzed to determine if the conductive line may be operating at or near a specific frequency, such as a resonance frequency. If the conductive line is operating at or near the specific frequency, an action, such as a memory operation, may be performed to mitigate the resonance of the conductive line. The monitoring, analyzing, and action performing may be accomplished with circuitry of the memory die.

公开(公告)号：US11726541B2

公开(公告)日：2023-08-15

申请号：US17502458

申请日：2021-10-15

Applicant: Micron Technology, Inc.

Inventor： Baekkyu Choi ,  Thomas H. Kinsley ,  Fuad Badrieh

IPC: G06F11/30 ,  G06F1/3225 ,  G06F1/30 ,  G06F1/3293

CPC classification number: G06F1/3225 ,  G06F1/30 ,  G06F1/3293

Abstract: A memory device may include a pin for communicating feedback regarding a supply voltage to a power management component, such as a power management integrated circuit (PMIC). The memory device may bias the pin to a first voltage indicating that a supply voltage is within a target range. The memory device may subsequently determine that a supply voltage is outside the target range and transition the voltage at the pin from the first voltage to a second voltage indicating that the supply voltage is outside the target range. The memory device may select the second voltage based on whether the supply voltage is above or below the target range.

公开(公告)号：US11636891B2

公开(公告)日：2023-04-25

申请号：US17243444

申请日：2021-04-28

Applicant: Micron Technology, Inc.

Inventor： Fuad Badrieh

IPC: G11C5/14 ,  G11C11/4076 ,  G11C11/4074 ,  H03F3/45 ,  H02M3/158

Abstract: Methods, systems, and devices for varying a time average for feedback of a memory system are described. An apparatus may include a voltage supply, a memory array, and a regulator coupled with the voltage supply and memory array and configured to supply a first voltage received from the voltage supply to the memory array. The apparatus may also include a voltage sensor configured to measure a second voltage of the memory array and a digital feedback circuit coupled with the memory array and regulator and configured to generate feedback comprising information averaged over a duration based at least in part on the second voltage measured by the voltage sensor and to transmit an analog signal to the regulator based at least in part on the feedback.

公开(公告)号：US11561597B2

公开(公告)日：2023-01-24

申请号：US17110140

申请日：2020-12-02

Applicant: Micron Technology, Inc.

Inventor： Thomas H. Kinsley ,  Baekkyu Choi ,  Fuad Badrieh

IPC: G06F1/32 ,  G06F1/3225

Abstract: Methods, systems, and devices for memory device power management are described. An apparatus may include a memory die that includes a power management circuit. The power management circuit may provide a voltage for operating one or more memory dies of the apparatus based on a supply voltage received by the memory die. The second voltage may be distributed to the one or more other memory dies in the apparatus.

公开(公告)号：US11353944B2

公开(公告)日：2022-06-07

申请号：US16863968

申请日：2020-04-30

Applicant: Micron Technology, Inc.

Inventor： Fuad Badrieh ,  Baekkyu Choi ,  Thomas H. Kinsley

IPC: G06F1/3225 ,  G06F1/3234 ,  G06F3/06

Abstract: Methods, systems, and devices for predictive power management are described. Correlations may be identified between a set of commands performed at the memory device and oscillating voltage patterns, or a resonance frequency, or both. Voltages may be monitored by the memory device and be compared to the identified voltage pattern to mitigate undesirable oscillating voltages and resonance frequency.