公开(公告)号：US07242052B2

公开(公告)日：2007-07-10

申请号：US11180080

申请日：2005-07-11

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： H01L29/788

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42328 ,  H01L29/42344 ,  H01L29/7883 ,  H01L29/7885

摘要： A stacked structure is formed over a substrate, and the stacked structure has a gate dielectric layer and a floating gate thereon. A first dielectric layer, a second dielectric layer and a third dielectric layer are respectively formed over the top and the sidewalls of the stacked structure and the exposed substrate. A charge storage layer covers over the top and sidewalls of the stacked structure. Also, a pair of auxiliary gates is formed over the substrate beside the charge storage layer, and a gap is between the auxiliary gates and the charge storage layer.

摘要翻译： 堆叠结构形成在衬底上，堆叠结构在其上具有栅介电层和浮栅。 第一电介质层，第二电介质层和第三电介质层分别形成在层叠结构的顶部和侧壁以及暴露的基板上。 电荷存储层覆盖层叠结构的顶部和侧壁。 此外，在电荷存储层旁边的基板上形成一对辅助栅极，并且在辅助栅极和电荷存储层之间形成间隙。

公开(公告)号：US20060240618A1

公开(公告)日：2006-10-26

申请号：US11180080

申请日：2005-07-11

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： H01L21/336

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42328 ,  H01L29/42344 ,  H01L29/7883 ,  H01L29/7885

摘要： A method of fabricating a non-volatile memory is provided. A stacked structure is formed over a substrate, and the stacked structure has a gate dielectric layer and a floating gate thereon. A first dielectric layer, a second dielectric layer and a third dielectric layer are respectively formed over the top and the sidewalls of the stacked structure and the exposed substrate. A charge storage layer covers over the top and sidewalls of the stacked structure. Also, a pair of auxiliary gates is formed over the substrate beside the charge storage layer, and a gap is between the auxiliary gates and the charge storage layer.

摘要翻译： 提供了一种制造非易失性存储器的方法。 堆叠结构形成在衬底上，堆叠结构在其上具有栅介电层和浮栅。 第一电介质层，第二电介质层和第三电介质层分别形成在层叠结构的顶部和侧壁以及暴露的基板上。 电荷存储层覆盖层叠结构的顶部和侧壁。 此外，在电荷存储层旁边的基板上形成一对辅助栅极，并且在辅助栅极和电荷存储层之间形成间隙。

公开(公告)号：US07778076B2

公开(公告)日：2010-08-17

申请号：US11767980

申请日：2007-06-25

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： G11C16/04

CPC分类号： H01L29/42324 ,  G11C11/4125 ,  G11C14/00 ,  G11C14/0063

摘要： A memory unit is provided herein. Two non-volatile devices are used to store a logic state of the memory unit into the non-volatile devices. Although a power supply for the memory unit is shut down, the non-volatile devices still keep the data stored therein. The present invention not only has an advantage of high speed operation of a static random access memory (SRAM), but also has a function for storing data of a non-volatile memory.

摘要翻译： 本文提供了存储单元。 两个非易失性设备用于将存储器单元的逻辑状态存储到非易失性设备中。 虽然存储器单元的电源被关闭，但是非易失性设备仍然保持存储在其中的数据。 本发明不仅具有静态随机存取存储器（SRAM）的高速操作的优点，而且具有用于存储非易失性存储器的数据的功能。

公开(公告)号：US07759721B2

公开(公告)日：2010-07-20

申请号：US11383924

申请日：2006-05-17

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： H01L29/788

CPC分类号： H01L29/7881 ,  G11C16/0433 ,  G11C2216/10 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42328 ,  H01L29/66825

摘要： A non-volatile memory device comprises a substrate with the dielectric layer formed thereon. A control gate and a floating gate are then formed on top of the dielectric layer. Accordingly, a non-volatile memory device can be constructed using a single poly process that is compatible with conventional CMOS processes. In addition, an assist gate, or assist gates are formed on the dielectric layer next to and between the control gate and floating gate respectively. The assist gates are used to form inversion diffusion regions in the substrate. By using the assist gates to form inversion diffusion regions, the overall size of the device can be reduced, which can improve device density.

摘要翻译： 非易失性存储器件包括其上形成有电介质层的衬底。 然后在电介质层的顶部形成控制栅极和浮置栅极。 因此，可以使用与常规CMOS工艺兼容的单一多工艺来构造非易失性存储器件。 此外，辅助栅极或辅助栅极分别形成在控制栅极和浮置栅极之间和之间的电介质层上。 辅助栅极用于在衬底中形成反向扩散区域。 通过使用辅助栅极形成反向扩散区域，可以减小器件的整体尺寸，这可以提高器件密度。

公开(公告)号：US07672159B2

公开(公告)日：2010-03-02

申请号：US11620462

申请日：2007-01-05

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： G11C16/04

CPC分类号： G11C11/5692 ,  G11C16/0466 ,  G11C16/14

摘要： A method of operating a multi-level cell is described, wherein the cell includes a substrate of a first conductivity type, a control gate, a charge-storing layer and two S/D regions of a second conductivity type. The method includes an erasing step that injects charges of a first type into the charge-storing layer and a programming step that includes applying a first voltage to the substrate, a second voltage to both S/D regions and a third voltage to the control gate. The difference between the first and second voltages is sufficient to cause band-to-band tunneling hot holes, and the third voltage causes charges of a second type to enter the charge-storing layer. The third voltage can have 2n−1 different values, for programming the cell to a predetermined state among 2n−1 storage states.

摘要翻译： 描述了操作多电平电池的方法，其中电池包括第一导电类型的衬底，控制栅极，电荷存储层和第二导电类型的两个S / D区域。 该方法包括将第一类型的电荷注入到电荷存储层中的擦除步骤以及包括向基板施加第一电压的第二电压到控制栅的两个S / D区和第三电压的编程步骤 。 第一和第二电压之间的差异足以引起带对隧道的热孔，并且第三电压引起第二类型的电荷进入电荷存储层。 第三电压可以具有2n-1个不同的值，用于将单元编程到2n-1个存储状态中的预定状态。

公开(公告)号：US07411836B2

公开(公告)日：2008-08-12

申请号：US11248698

申请日：2005-10-11

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： G11C16/04

CPC分类号： G11C16/0475 ,  G11C16/12

摘要： A method of operating a non-volatile memory comprising a substrate, a gate, a charge-trapping layer, a source region and a drain region is provided. The charge-trapping layer close to the source region is an auxiliary charge region and the charge-trapping layer close to the drain region is a data storage region. Before prosecuting the operation, electrons have been injected into the auxiliary charge region. When prosecuting the programming operation, a first voltage is applied to the gate, a second voltage is applied to the source region, a third voltage is applied to the drain region and a fourth voltage is applied to the substrate. The first voltage is bigger than the fourth voltage, the third voltage is bigger than the second voltage, and the second voltage is bigger than the fourth voltage to initiate a channel initiated secondary hot electron injection to inject electrons into the data storage region.

摘要翻译： 提供了一种操作包括基板，栅极，电荷俘获层，源极区域和漏极区域的非易失性存储器的方法。 靠近源区的电荷捕获层是辅助电荷区，靠近漏极区的电荷捕获层是数据存储区。 在起诉前，电子注入到辅助电荷区域。 当起动编程操作时，向栅极施加第一电压，将第二电压施加到源极区域，向漏极区域施加第三电压，并向衬底施加第四电压。 第一电压大于第四电压，第三电压大于第二电压，第二电压大于第四电压，以启动通道启动的二次热电子注入，以将电子注入数据存储区域。

公开(公告)号：US20080175046A1

公开(公告)日：2008-07-24

申请号：US11625456

申请日：2007-01-22

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： G11C16/04 ,  G11C16/06

CPC分类号： G11C16/10 ,  B82Y10/00 ,  G11C11/5628 ,  G11C2211/5621 ,  G11C2216/06

摘要： A method of operating a multi-level cell is provided. The method includes the following the steps. (a) The multi-level cell is operated until a threshold voltage is larger than a pre-programming threshold voltage. And (b) the multi-level cell is operated until the threshold voltage is larger than a target programming threshold voltage and smaller than the pre-programming threshold voltage. Moreover, between the step (a) and the step (b), further comprises (c) A first verification step is performed. If the threshold voltage is smaller than the pre-programming threshold voltage, then repeat the step (a). Furthermore, after the step (b), further comprises (d) a second verification step is performed. If the threshold voltage is larger than the pre-programming threshold voltage, repeat the step (b), and if the threshold voltage is smaller than the target programming threshold voltage, repeat the steps (a)-(d).

摘要翻译： 提供了一种操作多级单元的方法。 该方法包括以下步骤。 （a）操作多电平电池，直到阈值电压大于预编程阈值电压。 和（b）多电平电池被操作直到阈值电压大于目标编程阈值电压并且小于预编程阈值电压。 此外，在步骤（a）和步骤（b）之间还包括（c）执行第一验证步骤。 如果阈值电压小于预编程阈值电压，则重复步骤（a）。 此外，在步骤（b）之后还包括（d）执行第二验证步骤。 如果阈值电压大于预编程阈值电压，则重复步骤（b），如果阈值电压小于目标编程阈值电压，则重复步骤（a） - （d）。

公开(公告)号：US20070081394A1

公开(公告)日：2007-04-12

申请号：US11248698

申请日：2005-10-11

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： G11C16/04

CPC分类号： G11C16/0475 ,  G11C16/12

摘要： A method of operating a non-volatile memory comprising a substrate, a gate, a charge-trapping layer, a source region and a drain region is provided. The charge-trapping layer close to the source region is an auxiliary charge region and the charge-trapping layer close to the drain region is a data storage region. Before prosecuting the operation, electrons have been injected into the auxiliary charge region. When prosecuting the programming operation, a first voltage is applied to the gate, a second voltage is applied to the source region, a third voltage is applied to the drain region and a fourth voltage is applied to the substrate. The first voltage is bigger than the fourth voltage, the third voltage is bigger than the second voltage, and the second voltage is bigger than the fourth voltage to initiate a channel initiated secondary hot electron injection to inject electrons into the data storage region.

摘要翻译： 提供了一种操作包括基板，栅极，电荷俘获层，源极区域和漏极区域的非易失性存储器的方法。 靠近源区的电荷捕获层是辅助电荷区，靠近漏极区的电荷捕获层是数据存储区。 在起诉前，电子注入到辅助电荷区域。 当起动编程操作时，向栅极施加第一电压，将第二电压施加到源极区域，向漏极区域施加第三电压，并向衬底施加第四电压。 第一电压大于第四电压，第三电压大于第二电压，第二电压大于第四电压，以启动通道启动的二次热电子注入，以将电子注入数据存储区域。

公开(公告)号：US07570514B2

公开(公告)日：2009-08-04

申请号：US11625456

申请日：2007-01-22

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： G11C16/04

CPC分类号： G11C16/10 ,  B82Y10/00 ,  G11C11/5628 ,  G11C2211/5621 ,  G11C2216/06

摘要： A method of operating a multi-level cell is provided. The method includes the following the steps. (a) The multi-level cell is operated until a threshold voltage is larger than a pre-programming threshold voltage. And (b) the multi-level cell is operated until the threshold voltage is larger than a target programming threshold voltage and smaller than the pre-programming threshold voltage. Moreover, between the step (a) and the step (b), further comprises (c) A first verification step is performed. If the threshold voltage is smaller than the pre-programming threshold voltage, then repeat the step (a). Furthermore, after the step (b), further comprises (d) a second verification step is performed. If the threshold voltage is larger than the pre-programming threshold voltage, repeat the step (b), and if the threshold voltage is smaller than the target programming threshold voltage, repeat the steps (a)-(d).

摘要翻译： 提供了一种操作多级单元的方法。 该方法包括以下步骤。 （a）操作多电平电池，直到阈值电压大于预编程阈值电压。 和（b）多电平电池被操作直到阈值电压大于目标编程阈值电压并且小于预编程阈值电压。 此外，在步骤（a）和步骤（b）之间还包括（c）执行第一验证步骤。 如果阈值电压小于预编程阈值电压，则重复步骤（a）。 此外，在步骤（b）之后还包括（d）执行第二验证步骤。 如果阈值电压大于预编程阈值电压，则重复步骤（b），如果阈值电压小于目标编程阈值电压，则重复步骤（a） - （d）。

公开(公告)号：US07485531B2

公开(公告)日：2009-02-03

申请号：US11760142

申请日：2007-06-08

申请人： Ming-Chang Kuo ,  Chao-I Wu

发明人： Ming-Chang Kuo ,  Chao-I Wu

IPC分类号： H01L21/336

CPC分类号： H01L29/792 ,  H01L21/28273 ,  H01L21/28282 ,  H01L29/42328 ,  H01L29/42344 ,  H01L29/7883 ,  H01L29/7885

摘要： A method of fabricating a non-volatile memory is provided. A stacked structure is formed over a substrate, and the stacked structure has a gate dielectric layer and a floating gate thereon. A first dielectric layer, a second dielectric layer and a third dielectric layer are respectively formed over the top and the sidewalls of the stacked structure and the exposed substrate. A charge storage layer covers over the top and sidewalls of the stacked structure. Also, a pair of auxiliary gates is formed over the substrate beside the charge storage layer, and a gap is between the auxiliary gates and the charge storage layer.

摘要翻译： 提供了一种制造非易失性存储器的方法。 堆叠结构形成在衬底上，堆叠结构在其上具有栅介电层和浮栅。 第一电介质层，第二电介质层和第三电介质层分别形成在层叠结构的顶部和侧壁以及暴露的基板上。 电荷存储层覆盖层叠结构的顶部和侧壁。 此外，在电荷存储层旁边的基板上形成一对辅助栅极，并且在辅助栅极和电荷存储层之间形成间隙。